Luc-Andre Gregoire

A Modular Multilevel Converter Pulse Generation and Capacitor Voltage Balance Method Optimized for FPGA Implementation

To generate numerous gating signals at a fast rate, industry controllers of modular multilevel converter (MMC) usually implement the pulse generation function in field-programmable gate array (FPGA) boards. Many methods of submodule (SM) capacitor voltage balance control (VBC) require knowing the gating signals and are therefore also implemented in the same FPGA. As the number of SMs in an MMC increases, both the latency and required resources for the implementation could become too large to meet the control requirements or fit into the FPGA. Conventional methods impose a limitation on the design of large MMC. This paper presents a pulse generation and VBC method that is optimized for FPGA implementation. With least comparison operation, this method produces the same valve voltage as other modulation methods, and it removes the need for a sorting operation in VBC, which is the main difficulty in FPGA implementation. The proposed method is implemented in the FPGA-based RT-LAB real-time simulator and tested in a hardware-in-the-loop setup. The performance of this method is validated in various tests.

A new 7L-PUC multi-cells modular multilevel converter for AC-AC and AC-DC applications

In this paper, a new cell based Modular Multilevel Converter (MMC) for AC-AC and AC-DC applications is presented. The new topology makes use of an efficient Packed U-Cells (PUC) structure to form the Multi-Cells Modular Multilevel Converters (M3C). It is a member of MMC root family, with extended operational capability covering therefore AC-AC and AC-DC modes of operation. A dynamic model of the PUC and the single phase M3C will be used along with predictive control method to validate the effectiveness of different operation modes of the converter.

An FPGA-based real-time simulator for HIL testing of modular multilevel converter controller

Recently, two Modular Multilevel Converter (MMC) projects are under construction in China. Since these are the first two multi-terminal MMC projects in the world and the controllers are sophisticated, a real time simulation platform becomes critical to enable hardware-in-the-loop (HIL) test and validation of the MMC controllers in various scenarios, before applying them in the field. This paper presents an FPGA-based real time simulator to simulate electromagnetic transients of MMC systems and connect to external controllers through fiber optics for HIL tests. The MMC valve model is implemented in the FPGA with a time step of 500 ns while the power system is simulated in the CPU. Protocol drivers are implemented in the same FPGA to secure fast communication and low latency on MMC signals through optical fibers. Each FPGA board can simulate one MMC station with 6 valves and total of up to 1530 sub-modules (SM). This simulator supports multiple FPGA boards, and is thus able to HIL test very large multi-terminal MMC systems. This study case demonstrates that the simulator is able to connect to an external controller and simulate the MMC behaviors in steady states, transients, and various fault conditions in real time. The parameters for the MMC model and communication protocol can be adjusted during simulation. The HIL test gives results closer to reality than tests using an internal controller. Accordingly, the presented real-time simulator is qualified as an HIL test bench for MMC controllers.

Real-Time Simulation of Power Electronic Systems and Devices

This chapter examines various aspects related to the real-time hardware-in-the-loop (HIL) simulation of power electronic systems and devices. It presents state-of-the-art solutions currently in use in industrial practice in terms of computational engines, solvers and HIL interface requirements. The chapter treats various techniques used to improve the effectiveness of fixed-step solvers in the real-time simulation of switching networks. A presentation of real-world applications concludes the chapter to give the reader a solid grasp on reality about the real-time simulation of power electronic systems and devices.

A new method of control for multilevel converter implemented on FPGA

This paper proposes a strategy of control for multilevel converter that uses capacitors as auxiliary power source. Though this paper emphasis on the inverter control, the method has been proved effective for rectifier as well. In multi-level converter, the regulation of the capacitor is done on different switching state. Depending of the ratio between output and input voltage, two different mode of regulation are used. For a smaller ratio, less levels are necessary and a simple hysteresis is sufficient to achieve regulation. For a larger ratio, the drifting PWM is used, which allow a slight variation in the switching state so regulation can be achieve. Case study where both methods are required is simulated and then tested on a fast prototyping development board, to prove their reliability. Once fully functional, it is implemented on an FPGA board, making the embedded system more affordable. Using this method the output voltage should follow its reference, even when the input voltage changes.

Hardware-in-the-Loop (HIL) to reduce the development cost of power electronic converters

This paper proposes a validation methodology for implementing solutions to challenges involved with power electronic converter design. Typically, the design process consists of first simulating the converter and then implementing it on hardware. Here, an intermediate step is added where the controller is connected to a real-time simulator before being connected to real hardware. This allows for virtual testing of scenarios that cannot be conducted with physical hardware without risking damage to the hardware. This technique will be demonstrated by implementing a new method of control, the drifting PWM, for a multilevel packed U-cell (PUC) converter. The drifting PWM allows for a slight variation in the switching state so that regulation of the auxiliary capacitor can be achieved. This method will be simulated offline and in real-time to demonstrate its long term reliability. Once fully functional, the controller is implemented on an FPGA board, from which it will control the real converter. Simulation results, as well as experimental results, are presented and compared. It is demonstrated that the HIL technique is a very effective tool for designing multilevel converter controllers.

Modular Multilevel Converters Overvoltage Diagnosis and Remedial Strategy During Blocking Sequences

In this paper, the authors first highlight an existing overvoltage phenomenon that is inherent to the modular multilevel converter (MMC) topology. The latter occurs during the blocking sequences of semiconductor devices if the converter needs to be stopped due to circulating current, loss of control, or unexpected faults. An analysis based on time-domain expressions describing each operating sequence during normal and faulty blocking conditions is used to demonstrate the origin of this overvoltage. Thereafter, system behaviour is obtained when devices gating signals are withheld as well as the exact overvoltage cause. Real-time simulation, with submicrosecond time steps, and experimental results validate the overvoltage phenomena and the proposed remedial strategy to avoid uncontrolled faulty conditions.

Modular Multilevel Converter model implemented in FPGA for HIL test of industrial controllers

Since Modular Multilevel Converters (MMC) have a sophisticated control, the real time simulation platform becomes critical for hardware-in-the-loop (HIL) test of the actual controllers in various scenarios before commissioning. This paper presents a multi-rate real time simulator that is able to simulate electromagnetic transients of MMC systems and connect to industrial controllers through fiber optics and copper wires for HIL tests. The MMC is implemented in field-programmable gate array (FPGA) with a sub-μs time step and the rest of the power system is simulated in the central processing unit (CPU) with a time step of 10~50 μs. Input and output (I/O) drivers are implemented in the same FPGA for a fast-rate and low-latency communication. Each FPGA accommodates up to 1530 sub-modules (SM), and multiple FPGA connected to one simulator can simulate MMC with more SM and multi-MMC systems. The performance is demonstrated in a 1500-SM MMC study case.

Real-Time Simulation-Based Multisolver Decoupling Technique for Complex Power-Electronics Circuits

This paper proposes a new method of decoupling and subdividing electrical circuits, containing power-electronics devices, in order to achieve fast and accurate real-time simulation. In this technique, each state variable can be discretized using different discretization methods. Combining implicit and explicit ODE solvers, state-space equations are decoupled while remaining accurate and stable. Unlike most traditional decoupling techniques previously proposed, the proposed one does not require artificial delay or supplementary states to be added in order to decouple the system. Furthermore, this technique is meant to be implemented with commercially available simulation software. By doing so, a large and complex circuit containing several hundreds of state variables can be easily and accurately simulated with minor modification to the existing models. Finally, stability and accuracy of the proposed technique are thoroughly demonstrated in a numerical example during steady state and under faulty conditions.

Model predictive control of a dual output seven-level rectifier

In this paper, a component efficient multilevel rectifier is modeled and controlled using Model Predictive Control (MPC) technique. The recently introduced Capacitor Tied Switches (CTS) converter structure features two distinct dc-load terminals which can operate at different voltage levels while experiencing high voltage levels at the ac-side terminals. The CTS converter structure inherits attractive features from the efficiency and power quality perspectives, with excellent topology performance which was validated through different simulation scenarios.