Luca Maresca

Short-circuit failure mechanism of SiC power MOSFETs

Failure mechanisms during short-circuit conditions of Silicon Carbide Power MOSFETs are analysed in this work, and a possible theoretical explanation is provided. Insight into the physics involved in such processes was inferred through experimental and numerical analyses. The TCAD structure used for electro-thermal simulations was calibrated to fit the ID-VGS characteristics of a commercial device. Adequate physical effects were considered, such as the presence of charges and traps at the oxide-SiC interface and their effect on threshold voltage and carrier mobility. Experimental evidences were explained by analyzing the numerical results. The high temperature reached during these operating conditions was addressed as the main cause of the device failure. The effect on the leakage current and the activation of a parasitic bipolar transistor are also shown.

Physics of the Negative Resistance in the Avalanche

In this paper, we investigate the avalanche behavior of field-stop insulated gate bipolar transistors (IGBTs) by means of analytical and theoretical considerations, supported by ad hoc numerical simulations. A physical explanation of the presence of negative differential resistance branches in the avalanche I-V curve of the IGBT is presented and design criteria are derived to reduce and eventually eliminate this effect.

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Abstract In this paper a novel 3D electro-thermal simulator for high power devices operating in avalanche condition will be presented. The proposed solution is based on two coupled systems: a 3D-FEM thermal simulator and a 2D electrical solver. The simulator has been implemented in MATLAB language. It is capable of simulating a large number of macro-cells composing a wide-area power devices operating in avalanche condition. The electrical solver uses a SPICE-like algorithm with a look-up-table description for every cell. The thermal problem is solved by a finite element method (FEM) in an iterative scheme with the electrical simulator. In order to prove the effectiveness of the simulator, we will present electro-thermal simulations in Unclamped Inductive Switching (UIS) conditions for a high power Trench-IGBT.

Curve of Field Stop IGBTs: Collector Design Rules for Improved Ruggedness

This paper presents a new Infrared thermography system for thermal characterization of semiconductor electronic devices in transient and steady-state applications. The developed set-up is based on an IR camera having a 100Hz frame-rate at full-frame and a focal plane array of 640×512 InSb sensors. In order to extend the dynamic capabilities of the system a synchronization network generates timing signals to drive the experiment and trigger the IR-camera in an equivalent-time acquisition mode, up to 1MHz equivalent bandwidth. Moreover the proposed synchronized solution is able to detect thermal maps in a non-repetitive, single event, experiment. To prove the effectiveness of the proposed IR system, thermal measurements are presented on commercial Power-MOSFET, during short-circuit (SC) tests, and Power Schottky diode in unclamped inductive switching (UIS) test.

3D electro-thermal simulations of wide area power devices operating in avalanche condition

In this paper, we investigate the effect of collector design on the onset and the extension of the negative differential resistance (NDR) region that develops in the blocking curves of field-stop (FS) and punch-through (PT) insulated gate bipolar transistors. Differences on the NDR extension and on its temperature behavior for the PT structures with respect to the FS ones are found, and their dependence from the collector design is explained. Subsequently, the dynamic filamentary current conduction mechanism is studied by means of 2-D electrothermal simulations on a wide area structure with many elementary cells on PT and FS devices. The differences between the two structures in terms of filament movement and its influence on the max temperature of the hot spot are then demonstrated to adversely affect the ruggedness of PT devices compared with the FS ones.

An ultrafast IR thermography system for transient temperature detection on electronic devices

This work aims to present an investigation on short-circuit (SC) failure behaviour of SiC Power MOSFETs due to the onset of thermal runaway. As inferable from experimental outcomes, it is related to the formation of hotspot, whose exact location is mainly unpredictable and dictated by device structure and design parameters non-uniformities. TCAD simulations were performed to examine the impact of some parameters mismatch on hotspot formation and failure occurrence.

Effect of the Collector Design on the IGBT Avalanche Ruggedness: A Comparative Analysis Between Punch-Through and Field-Stop Devices

In this work we present a novel simulation environment for analysis of electro-thermal interaction in power semiconductor devices. The developed solution is based on the joint use of ELDO-COMSOL simulators in an iterative scheme between an electrical 2D SPICE network and 3D FEM thermal solver. The power device is described with a multi-cellular approach using proper temperature dependent SPICE library and macro-cell concept. The thermal problem is solved on a 3D domain considering the full chip structure, including package and bond-wires. In order to validate the proposed approach, simulations during short-circuit tests have been performed considering a commercial STripFET II Power-MOSFET. Finally the simulation results have been compared with transient InfraRed (IR) thermal measurements proving the effectiveness of the new simulator.

Influence of design parameters on the short-circuit ruggedness of SiC power MOSFETs

Abstract In this paper a physical model for the evaluation of the I – V curve in avalanche condition of the vertical PNP of an IGBT is presented. A two-zone linear approximation for the electric field in the depletion region is adopted and the slope of the two regions is defined from the total current and the ratio between the electrons and holes fluxes. The ratio between the electrons and holes which flow into the depletion region is evaluated by means of an accurate charge control model which provides the β of the PNP up to high injection current levels.

ELDO-COMSOL based 3D electro-thermal simulations of power semiconductor devices

In this paper, a temperature-dependent compact SPICE model of reverse-conducting IGBTs (RC-IGBTs) is presented. The proposed solution is based on a quasi-two-dimensional (2-D) approach, with the use of IGBT and p-i-n diode subcircuits suitably connected to take into account the inner interactions among the two devices. The resulting device model is derived through physical considerations on the RC-IGBT internal behavior, carried out by means of wide area TCAD 2-D simulations. Transversal current path, localized lifetime control effects, and turn-on dynamics are also included into the model. The model shows good robustness properties, even in demanding numerical conditions. Validation of the SPICE model with experiments performed on a 1.2-kV 30-A commercial device, in both static and dynamic conditions, demonstrates its remarkable correctness and accuracy. To further confirm the applicability of the proposed model in real-operating conditions, a quasi-resonant converter has been realized and the measurements on the realized circuit have been successfully compared with the results obtained with the proposed model.

Physically based analytical model of the blocking I–V curve of Trench IGBTs

Fast Recovery Epitaxial Diodes (FREDs) in the 600V voltage range are widely used for the design of Switch Mode Power Supply or snubberless DC-DC converters, where the devices can operate close to their intrinsic limitation in terms of maximum sustainable energy during avalanche operation. Experimental characterization of 600V rated FREDs in avalanche conditions has highlighted a failure due to a current level limitation. The mechanism cannot be attributed to the achievement of an avalanche energy threshold, therefore a current dependent mechanism is involved in the failure of the device. In this work this failure mechanism is addressed and the relevance of the termination design is highlighted.