Lucas Passmore

Modified three terminal charge pumping technique applied to vertical transistor structures

Vertical metal-oxide-semiconductor field-effect transistors (MOSFETs) have evolved into dominant members in the power transistor family. Reliability issues continue to be a major concern, as economic requirements drive towards miniaturization, and higher power ratings for these devices. The charge pumping method offers a simple, direct and powerful way of assessing interface damage for planar structures. Absence of an independent substrate contact in the vertical power structure implies that conventional charge pumping, which requires a substrate contact as well as three additional contacts to the remaining terminals of the MOSFETs, cannot be applied directly to these devices. In this article, we propose an adaptation of the charge pumping technique that enables its application to three terminal devices, in general. The modified form of charge pumping was applied to assess effects of Fowler–Nordheim stressing on production level U-shaped trench-gated MOSFETs. A good correlation between transfer characteri...

High-Sensitivity Tracking of MOSFET Damage Using Dynamic-Mode Transient Measurements

MOSFET reliability studies have primarily been based upon the application of quasi-static analysis techniques, although MOSFETs are fully dynamical systems. Here, we present a method for the extraction of damage metrics based upon the transient response of the drain-to-source current Ids to a step input to the gate of the device. This new dynamical technique produces a measure of device degradation that is an order of magnitude more sensitive than previous methods and also allows characterization of the device in situations better matching actual operation. We are also able to track the evolution of damage to the device in real time, which makes it possible to predict the remaining time to failure.

Low-Frequency Three-Terminal Charge Pumping Applied to Silicon Nanowire Field-Effect Transistors

We report on the application of the charge-pumping (CP) technique to vapor-liquid-solid grown silicon nanowire (SiNW) transistors. We use an Ω gate-nanowire field-effect-transistor (OG-NWFET) structure, and we employ a modified CP method that is applicable to three terminal devices. The trap density from CP measurements correlates very well with the results obtained from subthreshold slope measurements. The relatively high trap densities measured and the observed saturation of the CP signal with the measurement frequency are discussed in terms of device dimensions and geometry.

Current-Voltage Characteristics and Charge-Carrier Traps in N-Type 4H-SiC Schottky Structures

Because of their high switching speeds and low power losses, metal-SiC Schottky-barrier diodes (SBD) are important to high performance, high temperature, and high frequency applications in power electronics. The use of 4H-SiC in SBDs is particularly advantageous because it has higher electron mobility than other SiC polytypes. In this work we examine current-capacitance-voltage-temperature properties of Ti on 4H-SiC SBDs and develop fitting algorithms to extract diode parameters based on inhomogeneous barrier height analysis approaches. Also the quality of 4H-SiC is evaluated in terms of electrically active defects: this part of the work utilizes Fourier-transform deep level transient spectroscopy (FT-DLTS) to probe carrier traps. FT-DLTS reveals the presence of an electron trap located in energy at ~ 0.6 eV below the conduction band edge. This electron trap possesses a large capture cross section for electrons of the order of 10-12 cm2 which suggests that the electron capture is Coulombic and the associated charge transition in the defect is between positive and neutral states