Osama O. Awadelkarim

Impact of polysilicon dry etching on 0.5 /spl mu/m NMOS transistor performance: the presence of both plasma bombardment damage and plasma charging damage

Two types of damage mechanisms resulting from polysilicon gate dry etching are identified in 0.5 /spl mu/m NMOS transistors. One type of damage is found to be active even after full processing and to result in positive charge at the edge of the gate oxide. It is found to have no correlation with polysilicon antenna ratio and to be attributable to direct plasma bombardment. The other type of damage is found to be passivated after full processing but it is activated by electrical stress. After activation, this damage is an increasing function of polysilicon antenna ratio as well as overetch percentage. This second type of damage is attributable to plasma charging.<<ETX>>

Electrical properties of contact etched p‐Si: A comparison between magnetically enhanced and conventional reactive ion etching

We report the results of a comparative study of the damage induced in boron‐doped Si by contact etching. The two approaches compared are conventional reactive ion etching and magnetically enhanced reactive ion etching (MERIE). The two structure‐chemistry combinations used are SiO2/Si with CHF3/O2 plasmas, and bare Si wafers with CHF3/Ar plasmas. The damage examined in the Si substrates of both structures is that of electronic states in the band gap, the permeation into Si of hydrogen, and the deactivation of boron acceptors. These types of damage are explored by means of deep level transient spectroscopy and capacitance‐voltage measurements on Ti/Si Schottky diodes fabricated on the etched substrate surfaces. The gap states induced by these contact etches are ascribed to interstitial‐atom‐related defects which are proposed to be formed as a result of interactions involving self interstitials. During etching these defects are observed to be both generated by the etching process itself as well as electrical...

Plasma‐charging damage to gate SiO2 and SiO2/Si interfaces in submicron n‐channel transistors: Latent defects and passivation/depassivation of defects by hydrogen

New experimental results are presented which provide evidence for hydrogen passivation and depassivation of plasma‐charging‐induced defects in gate oxides and at oxide/silicon interfaces. The devices used in this study were 0.5 μm n‐channel metal–oxide–semiconductor field‐effect transistors fabricated on 200 mm boron‐doped silicon substrates. The processing included Cl2/HBr‐based chemistries for the polycrystalline silicon gate definition etch, and CHF3/CF4‐based chemistries for the contact etch. Plasma‐charging defects resulting from the processing are shown to have the following properties: (i) plasma‐induced charging defects are latent (electrically inactive) directly after our processing and before postmetallization annealing (PMA); (ii) these defects continue to be latent after N2 and Ar anneals done at temperatures T in the range 200 °C≤T≤400 °C; (iii) these defects are also latent after our standard PMA done in forming gas at 400 °C; (iv) these defects are electrically activated by room‐temperature...

Extracting the Richardson constant: IrOx /n-ZnO Schottky diodes

A method is proposed to account for the effects of Schottky barrier height inhomogeneities on the Richardson constant (A∗) extracted from current-voltage-temperature (I-V-T) measurements. Our approach exploits a correlation between the extracted Richardson constant and effective barrier height. As a test case, the method is applied to I-V-T measurements performed on IrOx/n-ZnO Schottky diodes. A homogeneous A∗ value of 27±7 A cm−2 K−2 is obtained, in close agreement with the theoretically expected value of 32 A cm−2 K−2 for n-type ZnO.

Degradation of submicron N-channel MOSFET hot electron reliability due to edge damage from polysilicon gate plasma etching

The impact of poly-Si gate plasma etching on the hot electron reliability of submicron NMOS transistors has been explored. The results show that the gate oxide and SiO/sub 2/-Si interface near the drain junction have a susceptibility to hot electron injection that increases with overetch time. We show for the first time that this degradation of hot electron reliability is attributable to the edge type of gate oxide damage resulting from direct plasma exposure during overetch processing. We demonstrate that this type of damage does not scale with channel length and becomes even more important in shorter channel transistors.<<ETX>>

Hydrogen and processing damage in CMOS device reliability: defect passivation and depassivation during plasma exposures and subsequent annealing

Abstract The interactions of hydrogen with plasma-charging induced defects have been examined using 0.5 μm n-channel LDD MOSFETs fabricated on p-type Si by employing Cl2/HBr-based chemistries and CHF3/CF4-based chemistries polycrystalline Si gate definition and contact etch, respectively. New experimental results are presented which provide evidence for the passivation and depassivation of defects in the gate oxide and at the oxide/Si interface by hydrogen.

Electronic states created in p‐Si subjected to plasma etching: The role of inherent impurities, point defects, and hydrogen

Reactive ion etching and magnetically enhanced reactive ion etching with CHF3/O2 are employed to remove SiO2 from boron‐doped Si substrates. Etch‐induced gap states in the substrate are monitored using deep‐level transient spectroscopy. The dominant state is found to be a donor with a hole binding energy of 0.36 eV. The state has been identified as that of the carbon‐interstitial oxygen‐interstitial pair. The depth profile of the pair is determined by two competing mechanisms: the pair generation and its electrical deactivation by atomic hydrogen. The latter process is especially prevalent in the presence of a magnetic field.

Changes in material properties of low- k interlayer dielectric polymers induced by exposure to plasmas

We have studied the effects of plasma treatments on the electrical, chemical and mechanical properties of fluorinated-poly-arylene-ether (FLARE) and divinylsiloxane-benzocyclobutane (BCB) polymers for use as low dielectric-constant (k) interlayer dielectrics in complementary metal-oxide-Si (CMOS). It is observed that plasma treatments induce anisotropy in k, which becomes more pronounced in FLARE. Also following the exposures, FLARE is rendered mechanically harder, whereas BCB becomes electrically leakier and the leakage current is significantly reduced by annealing in forming gas (6% H2 and 94% N2) at 350 °C for 30 min. These observations are explained in terms of polymer scissioning and cross-linking processes that are caused by plasma-polymer interaction mechanisms. These mechanisms include: (i) ion bombardment, (ii) ultraviolet radiation, and (iii) plasma charging. The latter mechanism is suggested to dominate the plasma-polymer interaction.

On the capacitance of metal/high-k dielectric material stack/silicon structures

Abstract The accumulation capacitance of metal–insulator–Si capacitors with SrTa 2 O 6 , ZrSiO 4 -based high- k gate dielectrics is observed to have significantly different dependence on the temperature and the frequency of a capacitance–voltage measurement than that of the conventional metal–oxide–Si capacitors. It is shown that this is due to contributions from the, often, inadvertently grown, and relatively poorer quality interfacial dielectric between the high- k material stack and the Si substrate.

Effects of barrier height inhomogeneities on the determination of the Richardson constant

Extraction of the Richardson constant and Schottky barrier height from the current-voltage-temperature (I−V−T) characteristics of Schottky barrier contacts is greatly influenced by a variety of nonideal effects. Starting with an overview of the original Richardson plot and relevant modifications of the Richardson plot, this article discusses limitations of previous analytical approaches that attempt to account for the effects of barrier height inhomogeneities on the extracted Richardson constant. A temperature-driven fundamental change in the current conduction in an inhomogeneous Schottky diode from conduction dominated by low barrier height patches to conduction dominated by high barrier height regions is identified as a likely source for the bowing of the Richardson plot, and knowledge of which regime dominates the current transport is critical for accurate determination of the Richardson constant. A simple linear relation between the effective Richardson constant and effective barrier height is descri...