M. De Michielis

Analytical Models for the Insight Into the Use of Alternative Channel Materials in Ballistic nano-MOSFETs

This paper presents new analytical derivations for the ballistic current of n-MOSFETs as a function of the transport direction, of the properties of the channel material, and of the technological parameters. The main purpose of the analytical expressions is to provide an insight into the optimization of the transistors with alternative channel materials. Our results simply explain why, for a given two-dimensional (2-D) density of states, an elliptic 2-D minimum can provide a current larger than a circular minimum if the best transport direction is selected. Furthermore, we analytically show that the use of channel materials with very small transport masses implies a tradeoff between the electron velocity and the gate drive capacitance, because of the finite capacitance of the inversion layer. This latter effect should be seriously considered in the context of the aggressive scaling of the equivalent oxide thickness enforced by the introduction of high-K dielectrics and multigate MOSFETs

A Semianalytical Description of the Hole Band Structure in Inversion Layers for the Physically Based Modeling of pMOS Transistors

This paper presents a new semianalytical model for the energy dispersion of the holes in the inversion layer of pMOS transistors. The wave vector dependence of the energy inside the 2-D subbands is described with an analytical, nonparabolic, and anisotropic expression. The procedure to extract the parameters of the model is transparent and simple, and we have used the band structure obtained with the k ldr p method to calibrate the model for silicon MOSFETs with different crystal orientations. The model is validated by calculating several transport-related quantities in the inversion layer of a heavily doped pMOSFET and by systematically comparing the results to the corresponding k ldr p calculations. Finally, we have used the newly developed band-structure model to calculate the effective mobility of pMOS transistors and compare the results with the experimental data. The overall computational complexity of our model is dramatically smaller compared to a fully numerical treatment (such as the k ldr p method); hence, our approach opens new possibilities for the physically based modeling of pMOS transistors.

Investigation of Strain Engineering in FinFETs Comprising Experimental Analysis and Numerical Simulations

This study combines direct measurements of strain, electrical mobility measurements, and a rigorous modeling approach to provide insights about strain-induced mobility enhancement in FinFETs and guidelines for device optimization. Good agreement between simulated and measured mobility is obtained using strain components measured directly at device level by a novel holographic technique. A large vertical compressive strain is observed in metal gate FinFETs, and the simulations show that this helps recover the electron mobility disadvantage of the (110) FinFET lateral interfaces with respect to (100) interfaces, with no degradation of the hole mobility. The model is then used to systematically explore the impact of stress components in the fin width, height, and length directions on the mobility of both n- and p-type FinFETs and to identify optimal stress configurations. Finally, self-consistent Monte Carlo simulations are used to investigate how the most favorable stress configurations can improve the on current of nanoscale MOSFETs.

On the origin of the mobility reduction in n- and p-metal–oxide–semiconductor field effect transistors with hafnium-based/metal gate stacks

We examine the mobility reduction measured in hafnium-based dielectrics in n- and p-MOSFETs by means of extensive comparison between accurate multi-subband Monte Carlo simulations and experimental data for reasonably mature process technologies. We have considered scattering with remote (soft-optical) phonons and remote Coulomb interaction with single layers and dipole charges. A careful examination of model assumptions and limitations leads us to the conclusion that soft optical phonon scattering cannot quantitatively explain by itself the experimental mobility reduction reported by several groups for neither the electron nor the hole inversion layers. Experimental data can be reproduced only assuming consistently large concentrations of Coulomb scattering centers in the gate stack. However, the corresponding charge or dipole density would result in a large threshold voltage shift not observed in the experiments. We thus conclude that the main mechanisms responsible for the mobility reduction in MOSFETs ...

Experimental and physics-based modeling assessment of strain induced mobility enhancement in FinFETs

This study combines direct measurements of channel strain, electrical mobility measurements and a rigorous modeling approach to provide insight about the strain induced mobility enhancement in FinFETs and guidelines for the device optimization. Good agreement between simulated and measured mobility is obtained using strain components measured directly at device level by a novel technique. A large vertical compressive strain is observed in FinFETs and the simulations show that this helps recover the electron mobility disadvantage of the (110) FinFETs lateral interfaces w.r.t. (100) interfaces, with no degradation of the hole mobility. The model is then used to systematically explore the impact of the fin-width, fin-height and fin-length stress components on n- and p-FinFETs mobility and to identify optimal stress configurations.

Semiclassical Modeling of Quasi-Ballistic Hole Transport in Nanoscale pMOSFETs Based on a Multi-Subband Monte Carlo Approach

This paper presents a new self-consistent multi-subband Monte Carlo (MSMC) simulator designed to investigate quasi-ballistic transport in nanoscale pMOSFETs. The simulator is 2-D in real space and k-space, and an accurate analytical model of the warped hole energy dispersion is adopted. The effects of the hole gas degeneracy are naturally included by accounting for the Paulis exclusion principle. The simulator is implemented by resorting to original solutions for handling the hole-free flights consistently with the complicated energy dispersion. A detail description of the formulation of the scattering rates used in the simulator and a comparison to calculations based on a k middot p quantization model are given. Upon an appropriate calibration, the new MSMC tool can accurately reproduce the experimental data for low field mobility, and it can be used for the analysis of the semiballistic transport regime in nanoscale pMOSFETs. Preliminary results for the ballistic ratios BR in double-gate silicon-on-insulator pMOSFETs show that the BR in pMOS are not much worse than in nMOS transistors.

Trade-off between electron velocity and density of states in ballistic nano-MOSFETs

This paper presents an analytical model for the on-current (I/sub ON/) of ballistic MOSFETs that points out how the reduction of the in-plane masses implies a trade-off between the increase of the electron velocity and the reduction of the 2D density of states (D/sub 2D/). Numerical simulations confirm the analytical results and demonstrate that the I/sub ON/ is deteriorated for materials with a very small D/sub 2D/.

On the Surface-Roughness Scattering in Biaxially Strained n- and p-MOS Transistors

Electron- and hole-mobility enhancements in biaxially strained metal-oxide-semiconductor transistors are still a matter for active investigation, and this brief presents a critical examination of a recently proposed interpretation of the experimental data, according to which the strain significantly modifies not only the root-mean-square value but also the correlation length of the surface-roughness spectrum. We present a systematic comparison between comprehensive numerical simulations and experiments, which supports such an interpretation.

Comparison of semiclassical transport formulations including quantum corrections for advanced devices with High-K gate stacks

Long-channel effective mobilities as well as transfer characteristics of a 32 nm single-gate SOI and a 16 nm double-gate (DG) MOSFET have been simulated with live different Monte Carlo (MC) device simulators. The differences are mostly rather small for the SOI-FET with quantum effects having a minor effect on threshold voltage due to the lowly doped channel, while the two multi-subband MC simulators show some prominent deviations in the case of the DG-FET. High-K mobility degradation by remote phonon scattering (RPS) in free carrier MC approximation leads to smaller performance degradation compared to multi-subband MC with remote Coulomb scattering (RCS) and RPS, but requires further investigations.