M. Eickelkamp

Study on quaternary AlInGaN/GaN HFETs grown on sapphire substrates

We report on AlInGaN/GaN heterostructure field effect transistors (HFETs) and the effect of different barrier material compositions. The analytical model for the interface charge in quaternary nitride heterostructures is described in detail and is applied in the calculation of the expected sheet carrier density. Experimental results from different lattice-matched AlInGaN/GaN heterostructures are presented and compared with the analytical predictions. Three heterostructures with AlInGaN barriers grown on sapphire substrates were processed and have been investigated. Each barrier layer was lattice-matched to GaN and the gallium content was 0.1, 0.15 and 0.2 at a barrier thickness of 13.5, 12.8 and 11.3 nm, respectively. Additionally, from these experiments, the basic trends for quaternary nitride Schottky barrier contacts are discussed. Finally, comprehensive dc characterizations have been performed. All devices had a gate length of 1 µm and exhibited a good transconductance of around 260 mS mm−1 at nearly the same current density level. An increase in threshold voltage as well as a decrease in gate leakage current for increasing GaN content has been observed. The nearly constant electron mobility in the range of 1700 cm2 V−1 s−1 at room temperature is within the best reported so far for HFETs with InN-containing barriers.

Electrical properties of thermally oxidized AlInN/AlN/GaN-based metal oxide semiconductor hetero field effect transistors

In this work, we report on the thermal oxidation of AlInN/AlN/GaN heterostructures. A “nearly native” Al2O3 oxide was formed during this oxidation procedure, which can be used as a gate oxide and thus enables the fabrication of metal insulator semiconductor hetero field effect transistors. A constant barrier height of ΦB ≈ 2.34 eV was obtained for all oxidized samples, independent of the oxidation time and temperature, indicating a stable AlInN-oxide interface. The interface state density was approximated to be as low as Nint = 2.5 × 1012 cm-2. Oxide thicknesses were estimated to be in the range of 0.6 nm and 3.2 nm, resulting in a suppression of reverse leakage currents oflarge area metal insulator semiconductor diodes by up to three orders of magnitude. Two-dimensional electron gas density and, in particular, carrier mobility are strongly affected by the thermal oxidation in the O2 atmosphere. A narrow processing window for successful thermal oxidation was identified, covering temperatures between 700 °...

Effect of stress voltage on the dynamic buffer response of GaN-on-silicon transistors

Back-gated measurements on conductive silicon substrates have been performed to investigate the effect of stress voltage on the dynamic behaviour of GaN-on-silicon (GaN-on-Si) transistors. Two comparable samples were studied with the only difference being the vertical dislocation density. Results show a clear correlation between dislocation density and the ability of the GaN buffer to dynamically discharge under high stress conditions.

Effect of Different Carbon Doping Techniques on the Dynamic Properties of GaN-on-Si Buffers

The effect of different carbon doping techniques on the dynamic behavior of GaN-on-Si buffer was investigated. Intentional doping using a hydrocarbon precursor was compared with the more common autodoping technique. Breakdown and dynamic behavior of processed devices indicate that extrinsic carbon doping delivers better dynamic properties for the same blocking voltage capabilities. Modeling and simulations have revealed that charge transport across the GaN buffer is the main limiting factor during the buffer discharge process.

Processing and characterization of recessed-gate AlGaN/GaN HFETs

AlGaN/GaN heterostructure field effect transistors with different gate recess depths have been fabricated using an ICP etch process. Subsequently, electrical DC characterization has been performed. The results have been compared with the theoretical predictions according to the simple charge control model, showing that for a given AlGaN/GaN structure there is an optimum thickness with respect to the maximum achievable transconductance. In our case a maximum of 210 mS/mm for the transconductance is found experimentally at approx. 14.5 nm barrier thickness under the gate. Furthermore, we took a detailed look at the measured threshold voltage which has a change in sign for a 9.5 nm gate-channel separation, demonstrating that an enhancement mode HFET has been realized.

The effect of AlN nucleation growth conditions on the inversion channel formation at the AlN/silicon interface

In recent years, GaN grown on silicon substrates (GaN-on-Si) managed to offer a commercial solution for harvesting the advantages of GaN-based devices whilst benefiting from the well-established silicon-based infrastructure. Although having an upper hand when it comes to cost, GaN-on-Si suffers from a vertical breakdown voltage which was found to be limited by the silicon substrate [1]. Earlier investigations showed that this breakdown is related to the formation of an inversion channel at the interface between the nucleation layer and the silicon substrate [2, 3]. This inversion layer acts as a source for electron injection during the application of high positive voltages relative to the substrate, thus leading to a premature breakdown. In this work we report on the characterization of this inversion channel and demonstrate that it can be suppressed by optimizing the growth conditions of the AlN nucleation layer. To obtain a deeper understanding of the inversion layer properties, two MOCVD AlN nucleation samples were grown on highly p-doped Silicon substrates, growth temperatures between 800 °C and 950 °C, while the desorption temperature was held at 950 °C. Vertical structures were then etched, with annealed Ti/Al/Ni/Au as ohmic contact to the silicon and Ni/Au Schottky contact to the AlN.

Advanced Modeling of MISHFET Devices and their Performance in Current-Mode Class-D Power Amplifiers

GaN HFETs and MISHFETs are promising power devices for RF and microwave power applications. However, the performance of devices can be compromised under some operating conditions. From the device development point of view, device optimization is necessary to obtain the best possible performance. For device modeling and design purposes, the device needs to be characterized and modeled accurately in order to foresee how the device will behave under realistic operating conditions. In this paper, an improved EEHEMT1-based model for GaN MISHFETs, will be introduced. This model is capable of describing the knee region of the devices output characteristics, dispersion effects as well as gate diode behavior accurately. The models will be incorporated in a switched-mode amplifier topology and evaluations will be made to determine the suitability of MISHFETs in these amplifiers.