M. Pomper

High-voltage DIMOS driver circuit

High-voltage output driver circuits realized with double implanted MOS (DIMOS) transistors are presented. Breakdown voltages exceed 100V. Dynamic bootstrap techniques resulted in circuits combining low power (5mW) and fast switching times (150ns) at typical operating conditions of 50V, 5OpF and 16kHz.

High-density static ESFI MOS memory cells

The area of static MOS memory cells is reduced by avoiding crossovers in the flip-flop, and by selecting the cell by a diode. Such cells have been realized in epitaxial silicon films on insulators (ESFI) with complementary transistors, diodes, and high-rated load resistors; the cell areas can be as small as 1500 /spl mu/m/SUP 2/ (2.4 mil/SUP 2/), and are the smallest areas of static MOS memory cells known so far. The static and dynamic behavior of these cells are discussed, as well as their behavior in a large-scale integrated (LSI) circuit; for this purpose an exploratory memory with 4096 bits and with simple decoding and sensing circuitry has been realized on an area of 3.5/spl times/4.2 mm (140/spl times/170 mils). Taking into account the measured data, an ESFI MOS memory circuit shows a better performance in speed and power dissipation than dynamic MOS memories, but its principal advantage is the static operation mode.

A 300K transistor NMOS peripheral processor

This paper describes the design and performance of a 16-bit microprocessor chip integrating more than 300K transistors on an area of 105 mm2. The circuit has a large on-chip microprogram memory and is used for special peripheral control applications. A 2-um NMOS technology with polycide gates and two metal layers has been applied. The circuit operates at 25 MHz with a typical instruction cycle time of 200 ns.