M. Ramm

PhenoPET: A dedicated PET scanner for plant research based on digital SiPMs (DPCs)

In the framework of the German Plant Phenotyping Network (DPPN) we developed a novel PET scanner for imaging plants and crops. The observation of the carbon transport within the plant becomes possible by using 11CO2 as PET tracer. The use of the rather short living isotope C-11 asks for a scanner with high dynamic range. That means fast timing and high data rates are important features which let us choose the Philips Digital Photon Counter (DPC) as photo detector. Due to the fast photo detectors and the special crystal matrix arrangement the system will allow measurements with rather high activities. We could measure a coincidence resolution time of ~ 250 ps FWHM between two detector elements. This opens the opportunity to employ time-of-flight information for the first time on a PET scanner of this size. This paper presents very first results from a prototype single-ring system with a FOV of 18 cm diameter and 6.5 cm axial height.

Read-out electronics for digital silicon photomultiplier modules

This work has its focus on the development of fast read-out electronics for digital silicon photomultipliers (dSiPM -called Digital Photon Counter (DPC) by Philips).

Development of an AMC Module Management Controller

Most functional devices of an ATCA crate contain a controller to handle the management. We designed an AMC board and used a PIC32 for the MMC. Together with the gcc toolchain we chose an open source code as starting point.

MWPC-readout with the N110 TDC under Linux using a flexible, low-cost FPGA solution

For X-ray spectroscopy at the plasma physics tokamak TEXTOR in Forschungszentrum Julich three N110 TDC modules (developed by Christian Herve, ESRF, Grenoble) are used for the readout of multi-wire proportional counters (MWPC). An optimized low-cost FPGA-based CompactPCI board was developed, that interfaces the N110 and the TEXTOR timing system. The implemented software consists of a Linux device driver and a measurement application program. The Linux device driver is responsible for the transfer of list-mode detector and timing data via DMA into the main memory of a PC. After each TEXTOR shot the application program transfers the data from RAM to disk and adds administrative shot information automatically. Three boards can be read out by one PC simultaneously at the maximum speed of the N110

PET scintillator arrangement on digital SiPMs

A typical high resolution PET detector consists of a matrix of scintillator elements which are connected to a light guide in order to spread the light onto the pixels of a photo detector. In this work we introduce a matrix that works without light guide but has defined internal light leaks in order to allow controlled light sharing between the individual scintillator elements. This is especially useful when used together with the Philips digital SiPM DPC 3200. We show that better position determination is achieved and in addition higher count rates should be possible compared to a classical light guide solution.

Development of a readout system for the P̄ANDA Micro Vertex Detector

The Micro Vertex Detector (MVD) is the innermost tracking detector of the ANDA (antiProton Annihilation at Darmstadt) experiment at the upcoming FAIR (Facility for Antiproton and Ion Research) facility in Darmstadt. The detector consists of four barrel and six disk layers of silicon pixel and strip sensors to obtain precise tracking of charged particles. For the development of a front-end ASIC a flexible and powerful readout system was designed to test different ASIC prototypes. We will present the upgrade of the FPGA-based Julich Digital Readout System and measurements of the recent MVD pixel front-end prototype ToPix3. Tests of the implementation of the radiation hard GBT transfer protocol are also shown.

Developments for the readout of the PANDA micro vertex detector

The experiment PANDA (Antiproton Annihilation at Darmstadt) is under development for the future accelerator facility FAIR in Darmstadt, Germany. In the target spectrometer of PANDA a micro-vertex detector (MVD) will be used as the central tracking detector for charged particles. The design of the MVD is based on silicon strip detectors at the outer layer and on silicon pixel detectors at the inner layers. The paper discusses the requirements and first concepts of the DAQ system for the MVD which has to be finished about 2015. It presents the design of the lab system that has been developed already now for the test and readout of different frontend chips for pixel detectors. The lab system consists of a flexible readout board coupled via the SIS1100 Gigabit link to PCI. A further improvement of the lab system employing a 2 Gbit/s optical link to PCIe is introduced.

Concentrator for the readout of the PANDA Micro Vertex Detector based on MicroTCA

The Micro Vertex Detector (MVD) will be used as the central tracking detector in the PANDA (AntiProton Annihilation at Darmstadt) detector system which is under development for the future accelerator facility FAIR in Darmstadt, Germany. The design of the MVD is based on silicon strip detectors at the outer layer and on silicon pixel detectors at the inner layers. Data from the readout ASICs in the front end will be sent via GBT optical links to a multiplexing layer aggregating them to 10 Gbit/s optical uplinks to the Level-1 Trigger network. The multiplexing layer will be based on MTCA.4 using the HGF-AMC, a versatile MTCA.4 module developed by DESY in cooperation with KIT. In order to extend the multiplexing capabilities of the HGF-AMC, a Rear Transition Module (RTM) with 8 optical links has been designed.

The use of USB 3.0 for fast data transfer in a PET detector

The Research Centre Juelich is developing a PET detector for plant phenotyping together with Philips Digital Photon Counting, Aachen. The scientific goal is to study the carbon transport in plants. To detect the photon pairs we use a ring of digital photon counters recently developed by Philips. For the prototype we decided to use a Xilinx Kintex evaluation board for data concentration and processing of the coincidences. It is assumed that the necessary data rate from the FPGA to the acquisition computer is about 300 MByte/s. As data link a 10-gigabit Ethernet link would be preferred, but the evaluation board contains a USB 3.0 interface already, therefore we chose to use this one in order to reduce the development costs.

MicroTCA at the Multiplexing Level in the readout of the PANDA micro vertex detector

The PANDA (AntiProton Annihilation at Darmstadt) detector system is under development for the future accelerator facility FAIR in Darmstadt, Germany. In the target spectrometer of PANDA a micro-vertex detector (MVD) will be used as the central tracking detector for charged particles. The design of the MVD is based on silicon strip detectors at the outer layer and on silicon pixel detectors at the inner layers. Data from the readout ASICs in the front end are sent via GBT opical link (CERN development) to a Multiplexing Layer, where 3 GBT links are aggregated to 1 10 Gbit/s optical link to the Level-1 Trigger network. The Multiplexing Layer will be implemented with MTCA.4. The so-called HGF-AMC, a versatile AMC module developed by DESY in cooperation with KIT, will be used for the aggregation of the GBT links. The HGF-AMC is based on a Kintex-7 FPGA and supports MTCA.4.