M. Renavikar
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Featured researches published by M. Renavikar.
Journal of Electronic Materials | 2012
Z. Huang; Praveen Kumar; I. Dutta; John Hock Lye Pang; Rajen S. Sidhu; M. Renavikar; R. Mahajan
During service, microcracks form inside solder joints, making microelectronic packages highly prone to failure on dropping. Hence, the fracture behavior of solder joints under drop conditions at high strain rates and under mixed-mode conditions is a critically important design consideration for robust joints. This study reports on the effects of joint processing and loading conditions on the microstructure and fracture response of Sn-3.8%Ag-0.7%Cu (SAC387) solder joints attached to Cu substrates. The impact of parameters which control the microstructure (reflow condition, aging) as well as loading conditions (strain rate and loading angle) are explicitly studied. A methodology based on the calculation of the critical energy release rate, GC, using compact mixed-mode (CMM) samples was developed to quantify the fracture toughness of the joints under conditions of adhesive (i.e., interface-related) fracture. In general, higher strain rate and increased mode-mixity resulted in decreased GC. GC also decreased with increasing dwell time at reflow temperature, which produced a thicker intermetallic layer at the solder–substrate interface. Softer solders, produced by slower cooling following reflow, or post-reflow aging, showed enhanced GC. The sensitivity of the fracture toughness to all of the aforementioned parameters reduced with an increase in the mode-mixity. Fracture mechanisms, elucidating the effects of the loading conditions and process parameters, are briefly highlighted.
electronics packaging technology conference | 2009
J. Liu; P. Rottman; S. Dutta; Praveen Kumar; Rishi Raj; M. Renavikar; I. Dutta
With the continuing increase in power dissipation requirements of electronic devices, there is a need to develop new thermal interface materials (TIM) with much higher thermal conductivity (K) than that available from conventional TIMs. Recently, liquid phase sintering (LPS) has been proposed as a new paradigm for designing next generation composite-solder TIMs with a radically different microstructure from those of conventional solder-TIMs. LPS metallic composites are also attractive as phase change materials (PCM) for thermal energy storage, where the latent heat absorbed by the one of the phases upon melting can be stored for later retrieval and/or conversion to other forms of energy. The principal advantage of metallic PCMs over other materials include: (i) much greater energy storage per unit volume than organic PCMs; and (ii) much higher thermal conductivity than both organics and inorganic salt PCMs, which allow rapid heating and energy capture. This paper presents recent results on the development of metallic TIM and PCMs for energy storage, processed by LPS of a high melting phase (HMP) with a low melting phase (LMP). A discussion of processing issues, resultant properties, and modeling results expounding the benefits of these materials is presented.
Thermal Issues in Emerging Technologies, 2008. ThETA '08. Second International Conference on | 2009
Praveen Kumar; I. Dutta; Rishi Raj; M. Renavikar; V. Wakharkar
Because of their very high thermal conductivity, low melting point, and high shear compliance, indium-based materials are excellent candidates for thermal interface material (TIM) applications for packaging thermally sensitive next-generation devices. However, currently used indium-based solders suffer from 2 serious shortcomings: (i) high cost due to high indium content, and (ii) very low compressive strength and creep resistance which may lead to structural instability following heat-sink attachment. In order to circumvent these problems, and also introduce a built-in melting point hierarchy following initial reflow, a radically different approach for producing microelectronic solder TIMs based on liquid phase sintering (LPS) is being developed. In this paper, we report on the processing and characterization of LPS Sn-In solders, the microstructure of which consists predominantly of particles of the high melting phase (HMP) Sn and a smaller amount of intergranular low melting phase (LMP) In. By optimizing the In content, highly compliant LPS solders with flow stresses close to that of pure In were obtained. The electrical and thermal conductivity of the LPS solder was found to be about half that of pure In. It is demonstrated that metallurgically good joints can be produced between this new solder and Cu substrates during a single step which combined LPS with joining. The contact thermal resistance of the internal grain boundaries was estimated, and it is inferred that because of the numerous internal boundaries, the solder/substrate interfaces have relatively small effect on the joint resistance. Based on the estimated boundary resistance, a previously developed model was utilized to predict the thermal conductivity of the LPS solder as a function of HMP volume fraction and particle size.
ASME 2011 Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems, MEMS and NEMS: Volume 2 | 2011
J. Liu; Praveen Kumar; I. Dutta; C. M. Nagaraj; Rishi Raj; M. Renavikar; R. Mahajan
In this study, a novel architecture composed of uniformly distributed high melting phase (HMP, e.g. Cu) in a low melting phase (LMP, e.g. In) matrix, which can be produced via liquid phase sintering (LPS), is proposed to produce next generation thermal interface materials (TIMs) and interconnect (IC) materials. The LMP determines the shear compliance of these composites whereas the HMP determines its thermal and electrical conductivities. The volume fraction of In was optimized to produce a Cu-In solder with suitable mechanical, electrical and thermal properties for TIM and IC applications. Since, Cu and In react to form several Cu-In intermetallic compounds (IMCs), which may deteriorate the long-term performance of these solders, interfacial-layers of Au and Al2 O3 were applied on Cu to further improve the performance of the Cu-In solders. The effect of interfacial-layers on the reaction between Cu and In, during sintering at 160°C and during aging at 125°C, was studied and its impact on the mechanical, thermal and electrical properties was evaluated. Au interfacial layer (50∼200nm) quickly reacted with In to form AuIn2 IMC, which acted as a tenacious diffusion-barrier and slowed down the reactions between Cu and In. 8-monolayer thick Al2 O3 did not react with either Cu or In and inhibited reactions between Cu and In. During short-time sintering, the effect of interfacial layer on the thicknesses of IMCs was insignificant to affect the yield strength of the as-sintered composites. However, IMC layer thickened rapidly in the Cu-In composites without an interfacial-layer, which led to a drastic decrease in the volume fraction of unreacted In leading to an increase in the yield strength of the solder. On the other hand, the interfacial-layers effectively suppressed the growth of IMCs during aging and hence the yield strength of such composites increased at slower rates. Since, the IMCs formed at the interface radically affect the contact resistance, significant differences in the thermal and electrical conductivities were recorded for the solders with different interfacial-layers.Copyright
ASME 2011 Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems, MEMS and NEMS: Volume 2 | 2011
Z. Huang; Praveen Kumar; I. Dutta; John H. L. Pang; Rajen S. Sidhu; M. Renavikar; R. Mahajan
During service, micro-cracks form inside solder joints, making a microelectronic package prone to failure particularly during a drop. Hence, the understanding of the fracture behavior of solder joints under drop conditions, synonymously at high strain rates and in mixed mode, is critically important. This study reports: (i) the effects of processing conditions (reflow parameters and aging) on the microstructure and fracture behavior of Sn-3.8%Ag-0.7%Cu (SAC387) solder joints attached to Cu substrates, and (ii) the effects of the loading conditions (strain rate and loading angle) on the fracture toughness of these joints, especially at high strain rates. A methodology for calculating critical energy release rate, GC , was employed to quantify the fracture toughness of the joints. Two parameters, (i) effective thickness of the interfacial intermetallic compounds (IMC) layer, which is proportional to the product of the thickness and the roughness of the IMC layer, and (ii) yield strength of the solder, which depends on the solder microstructure and the loading rate, were identified as the dominant quantities affecting the fracture behavior of the solder joints. The fracture toughness of the solder joint decreased with an increase in the effective thickness of the IMC layer and the yield strength of the solder. A 2-dimensional fracture mechanism map with the effective thickness of the IMC layer and the yield strength of the solder as two axes and the fracture toughness as well as the fraction of different fracture paths as contour-lines was prepared. Trends in the fracture toughness of the solder joints and their correlation with the fracture modes are explained using the fracture mechanism map.Copyright
electronics packaging technology conference | 2010
Z. Huang; Praveen Kumar; I. Dutta; John H. L. Pang; Rajen S. Sidhu; M. Renavikar; R. Mahajan
Solder joints, which serve as mechanical and electrical interconnects in a package, are particularly prone to failure during a drop. Hence, the fracture behavior of solders at high strain rates and in mixed mode is a critically important design parameter. This study reports the effects of (a) loading conditions (strain rate and loading angle), (b) reflow parameters (dwell time and cooling rate), and (c) post-reflow aging on the mixed mode fracture toughness of a lead-free solder (Sn-3.8%Ag-0.7%Cu)/Cu joint. A methodology based on the calculation of critical energy release rate, GC, which is equal to the fracture toughness of a material under limited plasticity condition, was employed. An increase in the strain rate results in limited plasticity ahead of the crack tip leading to a reduction in the fracture toughness of the solder joints. Fracture toughness also decreases with increasing mode-mixity (up to a loading angle of 75°). A slower cooling rate increases the fracture toughness whereas a longer dwell time adversely affects it. Also, aged samples show higher GC value. A fracture mechanism map is developed to describe the correlation between the yield strength of the solder, which depends on the solder microstructure and the loading rate, the IMC morphology, which depends on the reflow conditions and aging, and the fracture toughness of the solder joint.
Journal of Electronic Materials | 2006
M.A. Dudek; R. S. Sidhu; N. Chawla; M. Renavikar
Archive | 2011
M. Renavikar; Daewoong Suh; Carl Deppisch; Abhishek Gupta
Archive | 2005
Thomas J. Fitzgerald; M. Renavikar; Susheel G. Jadhav
Journal of Electronic Materials | 2012
Praveen Kumar; Z. Huang; I. Dutta; Rajen S. Sidhu; M. Renavikar; R. Mahajan