M. Schroter

A scalable high-frequency noise model for bipolar transistors with application to optimal transistor sizing for low-noise amplifier design

Fully scalable, analytical HF noise parameter equations for bipolar transistors are presented and experimentally tested on high-speed Si and SiGe technologies. A technique for extracting the complete set of transistor noise parameters from Y parameter measurements only is developed and verified. Finally, the noise equations are coupled with scalable variants of the HICUM and SPICE-Gummel-Poon models and are employed in the design of tuned low noise amplifiers (LNAs) in the 1.9-, 2.4-,and 5.8-GHz bands.

Simulation and modeling of the low-frequency base resistance of bipolar transistors and its dependence on current and geometry

The current and geometry dependence of the low-frequency base resistance of high-speed bipolar transistors was investigated by means of quasi-three-dimensional numerical device simulations. It is shown that the total base resistance can be separated into a current- and geometry-dependent internal part and an only geometry-dependent external part. Both of these parts can be accurately approximated by simple analytical formulas which are well suited for compact transistor modeling. The investigations are based on sheet resistances and dimensions the values of which are typical for self-aligned double-polysilicon technology. >

A scalable high frequency noise model for bipolar transistors with application to optimal transistor sizing for low-noise amplifier design

Fully scalable, analytical HF noise parameter equations for bipolar transistors are presented and experimentally tested on high speed Si and SiGe technologies. A technique for extracting the complete set of transistor noise parameters from Y parameter measurements only is developed and verified. Finally, the usefulness of the noise model is demonstrated in the design of tuned LNAs in the 1.9 GHz, 2.4 GHz, and 5.8 GHz bands.

A compact bipolar transistor model for very-high-frequency applications with special regard to narrow emitter stripes and high current densities

Abstract In advanced silicon bipolar technologies very narrow emitter stripes can be realized. As a consequence, the transistors in high-frequency (h.f.) ICs should be operated at high current densities in order to obtain maximum operating speed. Therefore, in this paper a semi-physical compact transistor model is presented which is proven to be well suited for simulating analog h.f. ICs up to fT even in the high-current region. It is based on an improved version of the transistor model HICUM which has first been described in[1,2] and which was successfully applied for designing high-speed digital circuits. The model presented here, however, is not only superior in very-high-frequency applications but also in modeling narrow-emitter transistors. These advantages are obtained by accurately taking into account non-quasi-static transistor behavior, h.f. emitter current crowding, and emitter-periphery effects, as well as by improving the operating point dependence of basic parameters. Due to the physical nature of the model, the elements of the equivalent circuit can easily be calculated for arbitrary transistor geometries at arbitrary operating points and temperatures from a single set of specific electrical and technological data. This makes the model very well suited for circuit optimization. The compact model, which has been implemented in SPICE, was successfully verified by means of two-dimensional device simulations based on the doping profile of a real self-aligned double-polysilicon transistor. In order to be sure that verifying the compact model by device simulations replaces the measurements correctly, the model parameters were determined by device simulation too, but applying the methods used for experimental parameter extraction.

EXPERIMENTAL DETERMINATION OF THE INTERNAL BASE SHEET RESISTANCE OF BIPOLAR TRANSISTORS UNDER FORWARD-BIAS CONDITIONS

A comparatively simple method is described which allows to measure the sheet resistance rsi of the internal base even for a strong injecting emitter (strong “forward-bias condition”). For this, a well-known bipolar transistor tetrode with two separated base contacts is used. In order to extend the admissible operating range to sufficiently high collector current densities, corrections of the directly measured (voltage and current modulated) sheet resistance are required, which eliminate the error caused by emitter current crowding and emitter edge effects. For this, analytical correction terms are derived by solving a simplified differential equation for the internal base region. Moreover, the interrelation between rsi and the total hole charge of the internal transistor (which can be determined experimentally) can be used to extend the admissible current density range further. The proposed method was verified by numerical device simulations and, in addition, applied to experimental rsi determination. It proved to be well suited up to very high collector current densities, where rsi is considerably reduced compared to its zero-bias or even weak-injection value.

Carbon Nanotube FET Technology for Radio-Frequency Electronics: State-of-the-Art Overview

Carbon-based electronics is an emerging field. Its present progress is largely dominated by the materials science community due to the many still existing materials-related obstacles for realizing practically competitive transistors. Compared to graphene, carbon nanotubes provide better properties for building field-effect transistors, and thus, have higher chances for eventually becoming a production technology.

A generalized integral charge-control relation and its application to compact models for silicon-based HBT's

A generalized version of Gummels integral charge-control relation (ICCR) is derived, which-in contrast to the classical ICCR-is valid also for HBTs. As a drawback of this generalized ICCR (GICCR) the required separation of the total minority charge into the contributions of the different transistor regions is not possible by measurements. Therefore, a simplified version of the GICCR is presented the parameters of which can be determined experimentally in a simple manner for the operating range of interest. This approach could provide a powerful basis for the development of compact HBT models for circuit simulation. The validity of the different approaches is verified by one- and two-dimensional device simulation for several practical SiGe-base HBTs with different doping profiles and Ge mole fractions. >

Modeling thermal resistance in trench-isolated bipolar technologies including trench heat flow

Abstract Heat flow in short emitter length bipolar devices in trench-isolated technologies is investigated through three-dimensional numerical thermal simulation, and thermal conduction through the trench walls is shown to be important for these structures. A new model is presented which predicts the thermal resistance of bipolar transistors in trench-isolated technologies down to emitter lengths of 1.2 μm. The effect of the parasitic thermal path introduced by emitter metal is also included in the new model. The prediction of this model is compared to numerical simulation and measurement, and found to be in excellent agreement.

Physical modeling of lateral scaling in bipolar transistors

The dependence of important transistor characteristics, such as transit frequency, on emitter width and length is modeled on a physical basis. Closed-form explicit analytical equations are derived for modeling the emitter size dependence of the low-current minority charge and transit time, the critical current indicating the onset of high injection in the collector, and the stored minority charge in the collector at high injection. These equations are suited for application in various compact transistor models such as the SPICE Gummel-Poon model (SGPM) as well as the advanced models HICUM and MEXTRAM. As demonstrated by two- and three-dimensional device simulation and measurements, combination of the derived equations with HICUM results in accurate prediction of the characteristics of transistors with variable emitter length and width. As a consequence, the new model makes the conventional transistor library unnecessary and offers bipolar circuit designers the flexibility to use the transistor size that fits the application best.

A computationally efficient physics-based compact bipolar transistor model for circuit Design-part I: model formulation

A compact bipolar transistor model is presented that combines the simplicity of the SPICE Gummel-Poon model (SGPM) with some major features of HICUM. The new model, called HICUM/L0, is more physics-based and accurate than the SGPM and at the same time, from a computational point of view, suitable for simulating large circuits. The new model has been implemented in Verilog-A and, as compiled code, in various commercial circuit simulators. In Part I, the fundamental model formulation is presented along with a derivation of the most important equations. Experimental results are shown in Part II.