M. Tapajna

Microstructure of HfO2 and HfxSi1-xOy Dielectric Films Prepared on Si for Advanced CMOS Application

We analyzed microstructure of as-deposited and rapid thermal annealed HfO₂ and Hf_xSi_1-xO_y dielectric films with Ru gate electrode. As-deposited films exhibited dielectric constant 12 and 20 for Hf_xSi_1-xO_y and HfO₂, respectively. TEM and grazing incidence XRD revealed that as-deposited HfO₂ films have polycrystalline character, while Hf_xSi_1-xO_y films are amorphous. Rapid thermal annealing makes favourable growth of monoclinic HfO₂ phase in HfO₂ films and tetragonal or orthorhombic phase in Hf_xSi_1-xO_y films

Post-deposition annealing and thermal stability of integrated self-aligned E/D-mode n ++ GaN/InAlN/AlN/GaN MOS HEMTs

We describe technology and evaluate thermal performance of enhancement/depletion (E/D)-mode n++GaN/InAlN/AlN/GaN HEMTs with a self-aligned metal-oxide-semiconductor (MOS) gate processing, where n++GaN layer was etched away only under the gate for E-mode and for D-mode stay intact. Gate contacts were isolated using a dielectric layer deposited at low temperature through an e-beam resist to retain the self-aligned approach. Threshold voltage of the as deposited E- and D-mode HEMTs was +0.6 V and -2.4 V, respectively. After post-deposition annealing (PDA) at 300 °C in N2 atmosphere the threshold voltage has been changed to +3 V and - 4,4 V for E- and D-mode HEMTs, respectively. These effects were explained by decreasing density of deep interface states in the D-mode HEMTs and decreasing surface donors at the semiconductor-oxide interface in case of the E-mode HEMTs. After PDA, electrical performance of both types of transistors was evaluated from room temperature to 150 °C. At elevated temperatures, injection and trapping of electrons from the gate metal to the oxide was found in D-mode HEMTs, while emission of electrons from the oxide-semiconductor interface states was crucial for the E-mode ones.

Thermal Stability of Ru Gate Electrode on HfSiO Dielectric

We have investigated advanced MOS structures containing Ru gate electrode, HfxSi1-xOy dielectric film and Si substrate. The Ru gate electrode was grown by MOCVD at 300 °C. The MOS structures were annealed for 30 min in forming gas and nitrogen at temperatures up to 550 °C. Capacitance-voltage measurements showed important shift of the flat band voltage of the Ru/ Hf x Si 1-x O y /Si gate stack after treatment at 550 °C. X-ray photoemission spectroscopy (XPS), ultraviolet photoemission spectroscopy (UPS), reflection electron energy loss spectroscopy (REELS) and secondary ion mass spectroscopy (SIMS) were used to analyze interface between ruthenium and high-k dielectric film. Based on the analysis we were able to build up energy-band alignement for the Ru/ Hf x Si 1-x O y interface. We observed that the energy-band structure of the Ru/Hf x Si 1-x O y interface remains stable upon annealing in forming gas up to 550 °C. Presence of hydrogen revealed by SIMS can account for compensation of negative charges in HfxSi1-xOy during thermal treatment.

Electrical characterisation of MIS photoanodes annealed under different conditions for solar fuel generation

The impact of post-deposition annealing of silicon based metal-insulator-semiconductor structures with SiO₂/TiO₂ dielectric layers is inspected by means of electrical characterisation. It is shown that annealing at 400 ^°C in the forming gas results into the photovoltaic response of MIS structure. Such behaviour is facilitated by the tunnelling of holes through SiO₂. Annealing at higher temperature or in the air ambient exhibit negligible photovoltaic response due to grown of additional SiO₂ at the interface and/or low interface quality.

Effect of HCl pretreatment on the oxide/semiconductor interface state density in AlGaN/GaN MOS-HEMT structures with MOCVD grown A1 2 O 3 gate dielectric

Suppression of surface donors (SDs) in AlGaN/GaN MOS-HEMTs represents a promising approach towards realization of normally-off switching devices with high threshold voltage. In this work, density of oxide/barrier interface traps (Dit) was determined in AlGaN/GaN MOS-HEMT structures with different SDs density (Nds), resulted from HCl pre-treatment variation. The results suggest deteriorated interface quality for sample without HCl cleaning. Dit was found to increase from ~1012 to ~1013 eV-1 cm-2 in the energy range of 0.8 to 1.1 eV below the conduction band edge for structures with and without HCl cleaning step, respectively. On the other hand, our analysis indicates negligible contribution of interface traps to observed threshold voltage in thermal equilibrium. This indicates the nature of SDs to be different from that of interface traps.

Threshold voltage instabilities in AlGaN/GaN MOS-HEMTs with ALD-grown Al 2 O 3 gate dielectrics: Relation to distribution of oxide/semiconductor interface state density

Metal-oxide-semiconductor (MOS) structure represents an important gate technology in GaN HEMTs. As oxide/semiconductor interface quality is remaining reliability concern, several techniques for determination of interface state density (D_it) has been proposed. In the literature, the hysteresis in C-V sweeps (or V_th shift, ΔV_th) is often interpreted as D_it in particular energy range in the semiconductor band-gap. In this work, we critically assessed a relevancy of relation between ΔV_th (measured at 25 and 125 ^°C) and experimentally determined D_it distribution, to point out possible pitfalls in the data interpretation. D_it distributions were measured by combination of complementary techniques and ID simulations applied to state-of-the-art MOS-HEMTstructures with Al₂O₃ films grown by ALD on AlGaN/GaN heterostructures. It is demonstrated that, apart from interface traps, also other parasitic effects related to border traps and oxide bulk traps can have dominant impact on ΔV_th-This means that ΔV_th could not be solely related to D_it, unless negligibility of other relevant effects is confirmed.

DC and pulsed IV characterisation of AlGaN/GaN MOS-HEMT structures with Al 2 O 3 gate dielectric prepared by various techniques

AlGaN/GaN metal-oxide-semiconductor high electron mobility transistors (MOS-HEMTs) represent an important technology for future high-efficient power and RF electronics. Due to oxide/semiconductor interface issues, fabrication of reliable MOS gate stack is still challenging, however. In this work we investigated the influence of gate oxide preparation technique to static and pulsed-mode operation of Al₂O₃/GaN/AlGaN/GaN MOS-HEMTs. Devices with gate oxide prepared by high-temperature MOCVD and low-temperature ALD using water vapour or ozone as oxidants are compared in terms of dynamic on-state resistance (R_DSon), threshold voltage shift (ΔV_th), and Al₂O₃/GaN interface charge density (N_it).

Distribution of fixed oxide charge in MOS structures with ALD grown Al 2 O 3 studied by capacitance measurements

We analyze the fixed oxide charge in Al₂O₃ grown by thermal and plasma enhanced ALD at 100 and 200 °C using capacitance-voltage measurements on MOS structures with different Al₂O₃ thickness. For both ALD techniques and deposition temperatures, Al₂O₃ shows negative fixed oxide charge with density in the range of 2-7×10¹² cm^-2, most likely located at the Al₂O₃/SiO₂ interface as inferred from the linear dependence of flat-band voltage on Al₂O₃ thickness. The break-down field ranges from 4 to 8 MV/cm illustrating a high quality of the Al₂O₃ layers. Post-deposition annealing was found to stabilize the Al₂O₃ dielectric constant determined to be similar to 9. Control of the negative Al₂O₃ fixed charge represents a promising way to e.g. enhance the threshold voltage shift of GaN based MOS heterostructure FETs towards normally-off operation.

Electrical characterization of Ru-and RuO 2 /Ta 2 O 5 gate stacks for nanoscale DRAM technology

Electrical properties of metal-oxide-semiconductor structures composed of MOCVD grown Ru or RuO₂ metal gates, rf sputtered Ta₂O₅ oxide layers, and nitrided Si was investigated. The dielectric constant of Ta₂O₅ as extracted from capacitance-voltage characteristics was found to be 24 and 28 for Ru and RuO₂ gated structures, respectively. Interfacial SiO₂-like layer with a thickness of ~2 nm was observed from X-ray reflectivity analysis. The effective work functions of Ru and RuO₂ in contact with Ta₂O₅ were found to be 4.65 and 4.8 eV, respectively. Temperature dependent current-voltage measurements indicate the transition from the Pool-Frenkel emission (or thermionic field emission) to the field emission conduction mechanism in combination with the direct tunneling across the SiO₂-like interfacial layer under gate as well as substrate injection.

Energy Band Diagram of the Ru/Hf0.75Si0.25Oy/Si Gate Stack

The authors have studied advanced MOS structure containing Ru gate electrode, Hf_0.75Si_0.25O_y dielectric and Si substrate by means of capacitance-voltage characteristics (C-V), X-ray photoelectron spectroscopy (XPS) and reflection electron energy loss spectroscopy (REELS). Using experimental values we have constructed energy band diagram of the Ru/Hf_0.75Si_0.25/Si gate stack