Mahmud Rahman

Statistical methods for the estimation of process variation effects on circuit operation

In this paper, a technology computer-aided design (TCAD) driven method for accurate prediction of the performance spread of integrated circuits due to process variations is presented. The methodology starts with the development of the nominal process recipe and process simulators are calibrated to an existing process to obtain nominal device characteristics. After determining nominal process parameters, their variations are introduced followed by screening experiments to determine the relative effects of given process variations on the input-output delay and the average power dissipation in a circuit. Response surface models (RSMs) are then generated based on critical process factors identified. Process parameter optimization is performed using these RSM models to tune the mean circuit performance and to improve the yield. This methodology is demonstrated on a 33-stage ring oscillator manufactured with a CMOS design flow. The proposed methodology maps the process domain to design space, and plays a key role in design for manufacturability (DFM) to quantify direct impact of the process variations on circuits.

Field emission properties of carbon nanotube pillar arrays

Carbon nanotube pillar arrays (CPAs) for cold field emission applications were grown directly on polished 70∕30at.% NiCr alloy surfaces patterned by photolithography. A carbon nanotube (CNT) pillar is a localized, vertically aligned, and well-ordered group of multiwalled CNTs resulting from van der Waals forces within high-density CNT growth. The edge effect, in which the applied electric field is enhanced along the edge of each pillar, is primarily responsible for the excellent emission properties of CPAs. We achieved efficient emission with turn-on fields as low as 0.9V∕μm and stable current densities as high as 10mA∕cm2 at an applied macroscopic field of 5.7V∕μm. We investigated the effects of pillar aspect ratio, density, and spacing on CPA field emission and quantified the edge effect with respect to pillar aspect ratio through modeling. We also investigated the field emission stability and found substantial improvement with CPAs compared to continuous and patterned CNT films.

Carbon nanotube pillar arrays for achieving high emission current densities

We introduce an innovative geometry carbon nanotube (CNT) field emitter array capable of achieving stable and high current densities. Arrays of toroid CNT pillars were grown directly on bulk metal alloy substrates and on patterned metal catalyst on silicon substrates. Compared to a solid CNT pillar array (CPA), this toroid CPA (tCPA) provides a larger edge area for achieving a higher stable current density of 50 mA/cm2 at an applied dc field of less than 8 V/μm. Electrostatic simulation data confirming the field enhancement at the inner and outer edges of the tCPA are also presented.

Electrical characterization of metal‐insulator‐semiconductor diodes fabricated from laser‐ablated YBa2Cu3O7−δ /yttria‐stabilized zirconia films on Si substrates

The purpose of this investigation is to study the electrical properties of the YBCO/YSZ/Si metal‐insulator‐semiconductor structure and the yttria‐stabilized zirconia (YSZ)/Si interface. The YBCO and YSZ layers were epitaxially grown in situ on Si by pulsed laser deposition. Current‐voltage measurements of devices fabricated on p‐type Si(100) showed a small leakage current density at 292 K, which decreased further at 80 K. Comparison of capacitance‐voltage measurements at 292 K for frequencies between 10 and 400 kHz showed a large variation of capacitance in the accumulation region demonstrating the presence of mobile ions in the YSZ layer. This variation is less pronounced at 80 K. A negative shift of about 5 V in threshold voltage from 292 to 80 K has been attributed to redistribution of charges in the YSZ buffer layer.

Interface analysis of Y‐Ba‐Cu‐O films on Al‐coated Si substrates

Y‐Ba‐Cu‐O films were deposited on Al‐coated Si substrates by the plasma‐spray method. The Al buffer layer appears to be effective in yielding crack‐free adhesive Y‐Ba‐Cu‐O films. Resistance measurements indicate that the films exhibit a superconducting phase below 90 K. Results of x‐ray microanalysis and x‐ray photoelectron spectroscopy confirm that the Al buffer forms an Al2O3 layer and prevents precipitation of Cu at the film/substrate interface.

Quantum-mechanically corrected variational principle for metal–oxide–semiconductor devices, leading to a deep sub-0.1 micron capacitor model

We treat an integral expression for electrostatic energy as a variational principle, with electric potential as the sole argument. We modify this principle to incorporate the quantum-mechanical (QM) effect of metal–oxide–semiconductor (MOS) interface charge confinement. The result is a QM-corrected variational principle for application to MOS devices. We apply this principle to develop a model of the sub-0.1 μm MOS capacitor. This variational-quantum-mechanical (VQM) model gives closed-form expressions for the behavior of threshold voltage, Vth, oxide capacitance, Cox, and depletion capacitance, Cj, as functions of the perimeter and area of the gate, thickness of the oxide, doping level, and temperature. Using this model, we further obtain closed-form expressions for QM-corrected dopant fluctuation-induced statistical deviation of Vth and Ctotal, as functions of gate dimensions, oxide thickness, doping level, and temperature. Excellent agreement is obtained when comparison with published detailed three-di...

Concurrent optimization of process dependent variations in different circuit performance measures

A method for multi-objective circuit variability optimization in the presence of process variations is presented. Critical process parameter variations are identified by determining their correlations to the circuit performance measures of interest. Then, the distributions of these critical process parameters are used to identify the critical designable parameters for variability optimization. Membership functions and fuzzy set intersection operators are used to transform multiple design objectives into a single objective function suitable for optimization. Afterwards, the objective function for variability is minimized. Finally, the mean circuit performance measures are fine tuned for given target specifications.

Properties and device applications of hydrogenated amorphous silicon carbide films

Hydrogenated amorphous silicon carbide (a‐SiC:H) films were deposited with a radio‐frequency plasma‐enhanced chemical vapor deposition system which utilizes a dc electric field applied independently of the inductively coupled rf field. The source gases were SiH4 and CH4. It was found that application of an electric field directed out of the substrate surface enhances the growth rate and yields some improvements in photoconductivity. The compositions of the films were evaluated by x‐ray photoelectron spectroscopy for a range of source gas mixtures. In order to assess the applicability of a‐SiC:H thin films, heterojunction a‐SiC:H/crystalline Si (c‐Si) diodes were fabricated and their electrical characteristics evaluated. The diode capacitance‐voltage results confirmed a step junction, which was consistent with the abruptness of the interface demonstrated by high‐resolution transmission electron microscopy. The heterojunction diodes also showed good rectifying properties, suggesting promise for a‐SiC: H in ...

Modeling intrinsic fluctuations in decananometer MOS devices due to gate line edge roughness (LER)

Intra-die random fluctuation outcomes inherent to fabrication processes such as gate LER give rise to corresponding fluctuations in device characteristics. These fluctuations become significant for devices with channel length less than 50 nm, a feature size rapidly approaching practical interest. At this scale, the fringe electric field and the charge confinement near the interface play dominant roles in determining MOS device properties and their fluctuations. In this work, we first characterize LER as a lognormal probability density function (pdf) in spatial frequency. Then we apply a 3D quantum mechanically corrected variational principle (VQM) to obtain closed-form expressions for standard deviation of threshold voltage and device capacitance due to LER. Our approach provides a simple physics based alternative to the presently available TCAD simulation for investigating these complex issues as functions of gate size, oxide thickness, and channel doping level.

Analysis of two-dimensional effects on subthreshold current in submicron MOS transistors

Abstract In short channel devices, the dependence of subthreshold current on drain induced barrier lowering, substrate bias, channel length, and temperature is modeled. NMOS devices down to effective channel length of 0.13 μm are considered. The model, based on drift-diffusion theory, accurately predicts such dependence as verified by results obtained using this model when compared with those obtained with numerical device simulators.