Norman G. Gunther

Effects of cathode structure on the field emission properties of individual multi-walled carbon nanotube emitters

We report the effect of cathode structure on the field emission properties of individual carbon nanotubes. Experimental field emission data are obtained for two well-defined cathode structures: a multi-walled carbon nanotube (MWNT) attached to an etched Ni metal wire and a MWNT attached to a flat Ni-coated Si microstructure. We observed different macroscopic turn-on fields of 1.6 and 2.5 V μm -1 , respectively, for the aforementioned experimental structures. This effect is investigated by detailed finite element analysis. We demonstrate that the geometry of the cathode structures significantly affects the microscopic tip field, leading to different turn-on voltages and field distributions for such individual MWNT emitters. Simulations show that changing the support geometry from a hemispherically capped shank to a cylindrical shank produces an increase in the macroscopic threshold field of 0.91 V μm -1 . This effect is further investigated by varying the support radius from 0.5 to 30 μm for a cylindrically shaped support structure. The results show that such a variation in the radius of the support structure produces an increase in the macroscopic turn on field from 0.72 to 5.89 V μm -1 . We also report quantitative evidence for the nonlinear relationship between the field enhancement factor as a function of support structure radius for nanostructures of three different aspect ratios.

Quantum-mechanically corrected variational principle for metal–oxide–semiconductor devices, leading to a deep sub-0.1 micron capacitor model

We treat an integral expression for electrostatic energy as a variational principle, with electric potential as the sole argument. We modify this principle to incorporate the quantum-mechanical (QM) effect of metal–oxide–semiconductor (MOS) interface charge confinement. The result is a QM-corrected variational principle for application to MOS devices. We apply this principle to develop a model of the sub-0.1 μm MOS capacitor. This variational-quantum-mechanical (VQM) model gives closed-form expressions for the behavior of threshold voltage, Vth, oxide capacitance, Cox, and depletion capacitance, Cj, as functions of the perimeter and area of the gate, thickness of the oxide, doping level, and temperature. Using this model, we further obtain closed-form expressions for QM-corrected dopant fluctuation-induced statistical deviation of Vth and Ctotal, as functions of gate dimensions, oxide thickness, doping level, and temperature. Excellent agreement is obtained when comparison with published detailed three-di...

Concurrent optimization of process dependent variations in different circuit performance measures

A method for multi-objective circuit variability optimization in the presence of process variations is presented. Critical process parameter variations are identified by determining their correlations to the circuit performance measures of interest. Then, the distributions of these critical process parameters are used to identify the critical designable parameters for variability optimization. Membership functions and fuzzy set intersection operators are used to transform multiple design objectives into a single objective function suitable for optimization. Afterwards, the objective function for variability is minimized. Finally, the mean circuit performance measures are fine tuned for given target specifications.

Modeling intrinsic fluctuations in decananometer MOS devices due to gate line edge roughness (LER)

Intra-die random fluctuation outcomes inherent to fabrication processes such as gate LER give rise to corresponding fluctuations in device characteristics. These fluctuations become significant for devices with channel length less than 50 nm, a feature size rapidly approaching practical interest. At this scale, the fringe electric field and the charge confinement near the interface play dominant roles in determining MOS device properties and their fluctuations. In this work, we first characterize LER as a lognormal probability density function (pdf) in spatial frequency. Then we apply a 3D quantum mechanically corrected variational principle (VQM) to obtain closed-form expressions for standard deviation of threshold voltage and device capacitance due to LER. Our approach provides a simple physics based alternative to the presently available TCAD simulation for investigating these complex issues as functions of gate size, oxide thickness, and channel doping level.

Analysis of two-dimensional effects on subthreshold current in submicron MOS transistors

Abstract In short channel devices, the dependence of subthreshold current on drain induced barrier lowering, substrate bias, channel length, and temperature is modeled. NMOS devices down to effective channel length of 0.13 μm are considered. The model, based on drift-diffusion theory, accurately predicts such dependence as verified by results obtained using this model when compared with those obtained with numerical device simulators.

Empirically Verified Thermodynamic Model of Gate Capacitance and Threshold Voltage of Nanoelectronic MOS Devices With Applications to

A thermodynamic variational model derived by minimizing the Helmholtz free energy of the MOS device is presented. The model incorporates an anisotropic permittivity tensor and accommodates a correction for quantum-mechanical charge confinement at the dielectric/substrate interface. The energy associated with the fringe field that is adjacent to the oxide is of critical importance in the behavior of small devices. This feature is explicitly included in our model. The model is verified using empirical and technology-computer-aided-design-generated capacitance-voltage data obtained on MOS devices with ZrO2, HfO2, and SiO2 gate insulators. The model includes considerations for an interfacial low-k interface layer between the silicon substrate and the high-k dielectric. This consideration enables the estimation of the equivalent oxide thickness. The significance of sidewall capacitance effects is apparent in our modeling of the threshold voltage (Vth) for MOS capacitors with effective channel length at 30 nm and below. In these devices, a variation in high-k permittivity produces large differences in Vth. This effect is also observed in the variance of Vth, due to dopant fluctuation under the gate.

\hbox{HfO}_{2}

Devices consisting of multiple distinct regions of semiconductor, dielectric, and conductor present special challenges to standard analysis methods. It is imperative to understand the interactions among these multiple regions because of their direct implication in device switching speed and power loss. We present a novel thermodynamic approach to modeling the quasi-static behavior of several devices including the trench-insulated gate bipolar transistor at a level of detail not otherwise available either experimentally or by standard methods. Our model is based on evaluating the thermodynamic Helmholtz free energy (F) of the device using parameterized trial functions for the electrostatic potential in each of its active regions. The resulting closed-form expressions for F are minimized using appropriate free parameters, yielding a variational solution of the system including the nonlinear effect of mobile charges constrained by either Boltzmann or Fermi-Dirac statistics. This solution is employed to extract the threshold voltage and to construct a terminal capacitance model by combining the internal capacitances distributed throughout the device. The model is then compared with measured terminal capacitance-voltage characteristics of some real devices to identify and interpret individual contributions. Our analysis reveals some characteristics of the interiors of the devices, which are not physically measurable.

and

In this paper, we compare the 3D VQM expressions obtained for the capacitive energy of the oxide region and the depletion region with those for a device with infinitely large gate. The 3D quantum mechanical effect of the fringe field on the energy is then extracted as a correction factor to the capacitance for each region.

\hbox{ZrO}_{2}

In this work we develop and demonstrate a novel variational methodology for modeling deep sub-micron (10 nm-100 nm) three-dimensional (3D) MOS devices that includes the important Quantum Mechanical (QM) interface charge confinement effect.

Gate Insulators

High voltage (600 V and above) Insulated Gate Bipolar Transistors (IGBTs) are among the most commonly used power switching devices for a wide range of industrial applications. The recently developed Trench-Gated IGBT (TIGBT) is a three-terminal device of great complexity, consisting of a MOSFET and a BJT in tandem [1]. In this work, a terminal capacitance model of the TIGBT is constructed by combining the internal capacitances distributed throughout the structure, subject to the constraint of minimum Helmholtz Free Energy. The model is then compared with measured terminal capacitance-voltage characteristics of the device to identify contributions from individual internal capacitances. Because of being based on energy, our method directly produces all internal MOS as well as p-n junction capacitances.