Mali Mahalingam

Thermal limits of flip chip package-experimentally validated, CFD supported case studies

This study projects the thermal performance limits of a flip chip package. A plastic, pin grid array (PGA) package with direct chip attach (DCA) interconnect was chosen for the demonstration purpose. The same methodology as developed here can be applied to other flip chip packages, The design rules chosen are the allowable power dissipation for constraints of junction temperature (/spl les/105/spl deg/C) and board temperature (/spl les/90/spl deg/C) under either free air or forced air (1.27 m/s) condition. An experimentally validated computational fluid dynamics (CFD) model was used to predict the thermal performance limits of the flip chip package. Simulations were run by increasing the power to the package under consideration until either the junction temperature or the board temperature reached its limit. Based on these constraints, the allowable power dissipation in the package was determined to be between 1.7 and 6.7 W in free air and between 2.1 and 13.7 W in 1.27 m/s of air. The validated CFD models offer enormous potential to quickly assess thermal limits of many future flip chip packages and their variations.

A shape optimal design methodology for packaging design

The hybrid natural shape optimal design approach is used along with a nonlinear programming (NLP) technique to find the optimal shapes of electronic packaging components. The design problems are formulated as min-max problems, and linear and materially nonlinear finite element analyses provide the function values. The applicability of the developed methodology is illustrated using a design example that deals with the packaging design of a plastic pad array carrier digital package. The results indicate that the methodology can be used as an effective way of evaluating different design alternatives or as a way of refining existing designs. The methodology and the tool set considered here have the potential to reduce the design cycle time in new product development efforts.<<ETX>>