Mamun Bin Ibne Reaz

A Review of Smart Homes—Past, Present, and Future

A smart home is an application of ubiquitous computing in which the home environment is monitored by ambient intelligence to provide context-aware services and facilitate remote home control. This paper presents an overview of previous smart home research as well as the associated technologies. A brief discussion on the building blocks of smart homes and their interrelationships is presented. It describes collective information about sensors, multimedia devices, communication protocols, and systems, which are widely used in smart home implementation. Special algorithms from different fields and their significance are explained according to their scope of use in smart homes. This paper also presents a concrete guideline for future researchers to follow in developing a practical and sustainable smart home.

Surface Electromyography Signal Processing and Classification Techniques

Electromyography (EMG) signals are becoming increasingly important in many applications, including clinical/biomedical, prosthesis or rehabilitation devices, human machine interactions, and more. However, noisy EMG signals are the major hurdles to be overcome in order to achieve improved performance in the above applications. Detection, processing and classification analysis in electromyography (EMG) is very desirable because it allows a more standardized and precise evaluation of the neurophysiological, rehabitational and assistive technological findings. This paper reviews two prominent areas; first: the pre-processing method for eliminating possible artifacts via appropriate preparation at the time of recording EMG signals, and second: a brief explanation of the different methods for processing and classifying EMG signals. This study then compares the numerous methods of analyzing EMG signals, in terms of their performance. The crux of this paper is to review the most recent developments and research studies related to the issues mentioned above.

Expert System for Power Quality Disturbance Classifier

Identification and classification of voltage and current disturbances in power systems are important tasks in the monitoring and protection of power system. Most power quality disturbances are non-stationary and transitory and the detection and classification have proved to be very demanding. The concept of discrete wavelet transform for feature extraction of power disturbance signal combined with artificial neural network and fuzzy logic incorporated as a powerful tool for detecting and classifying power quality problems. This paper employes a different type of univariate randomly optimized neural network combined with discrete wavelet transform and fuzzy logic to have a better power quality disturbance classification accuracy. The disturbances of interest include sag, swell, transient, fluctuation, and interruption. The system is modeled using VHSIC hardware description language (VHDL), a hardware description language, followed by extensive testing and simulation to verify the functionality of the system that allows efficient hardware implementation of the same. This proposed method classifies, and achieves 98.19% classification accuracy for the application of this system on software-generated signals and utility sampled disturbance events.

A novel SVM-kNN-PSO ensemble method for intrusion detection system

Graphical abstractThe objective of this paper is to develop ensemble based classifiers that will improve the accuracy of Intrusion Detection. For this purpose, we trained and tested 12 experts and then combined them into an ensemble. We used the PSO algorithm to weight the opinion of each expert. Because the quality of the behavioral parameters inserted by the user into PSO strongly affects its effectiveness, we have used the LUS method as a meta-optimizer for finding high-quality parameters. We then used the improved PSO to create new weights for each expert. For comparison, we also developed an ensemble classifier with weights generated using WMA 12. Fig. 1 depicts the entire process. For simplicity, the system framework was divided into the following seven stages:1.Kdd99 data pre-processing.2.Data classification with six different SVM experts.3.Data classification with six different k-NN experts.4.Data classification with ensemble classifier based on PSO.5.Data classification with ensemble classifier based on LUS improvement of PSO.6.Data classification with ensemble classifier based on WMA.7.Comparison of results for each approach.Display Omitted HighlightsIDS implemented using ensemble of a six SVM and a six k-NN classifier.Ensembles are created with weight generated by PSO and meta-PSO algorithms.These two ensembles outperform third ensemble system that is created with WMA. In machine learning, a combination of classifiers, known as an ensemble classifier, often outperforms individual ones. While many ensemble approaches exist, it remains, however, a difficult task to find a suitable ensemble configuration for a particular dataset. This paper proposes a novel ensemble construction method that uses PSO generated weights to create ensemble of classifiers with better accuracy for intrusion detection. Local unimodal sampling (LUS) method is used as a meta-optimizer to find better behavioral parameters for PSO. For our empirical study, we took five random subsets from the well-known KDD99 dataset. Ensemble classifiers are created using the new approaches as well as the weighted majority algorithm (WMA) approach. Our experimental results suggest that the new approach can generate ensembles that outperform WMA in terms of classification accuracy.

The FPGA prototyping of iris recognition for biometric identification employing neural network

In this paper, we present the realization of iris recognition for biometric identification employing neural network on Altera FLEX10 K FPGA device that allows for efficient hardware implementation. This method consists of two main parts, which are image processing and recognition. Image processing is implemented by using MATLAB and backpropagation method was used for recognition. The iris recognition neural network architecture is comprised of three layers: input layer with three neurons, hidden layer with two neurons and output layer with one neuron. Sigmoid transfer function is used for both hidden layer and output layer neurons. The timing analysis for the validation, functionality and performance of the model is performed using Aldec active HDL and the logic synthesis was performed using Synplify. Iris vector from captured human iris has been used to validate the effectiveness of the model. Test on the sample of 100 data showed an accuracy of 88.6% in recognizing the sample of irises.

Prototyping of Wavelet Transform, Artificial Neural Network and Fuzzy Logic for Power Quality Disturbance Classifier

Abstract Identification and classification of voltage and current disturbances in power systems are important tasks in their monitoring and protection. Introduction of knowledge-based approaches, in conjunction with signal processing and decision fusion techniques, enable us to identify delicate power quality related events. This article focuses on the application of wavelet transform technique to extract features from power quality disturbance waveforms and their classification using a combination of artificial neural network and fuzzy logic. The disturbances of interest include sag, swell, transient, fluctuation and interruption waveform. The system is modelled using VHDL and synthesized to Mercury EP1M120F484C5 FPGA, tested and validated. Comparisons, verification and analysis on disturbance signals validate the utility of this approach and achieved a classification accuracy of 98.19%. This novel and efficient method, and also implementation of the method in hardware based on FPGA technology, showed improved performance over existing approaches for power quality disturbance detection and classification.

SPEED: An Inhabitant Activity Prediction Algorithm for Smart Homes

This paper proposes an algorithm, called sequence prediction via enhanced episode discovery (SPEED), to predict inhabitant activity in smart homes. SPEED is a variant of the sequence prediction algorithm. It works with the episodes of smart home events that have been extracted based on the on -off states of home appliances. An episode is a set of sequential user activities that periodically occur in smart homes. The extracted episodes are processed and arranged in a finite-order Markov model. A method based on prediction by partial matching (PPM) algorithm is applied to predict the next activity from the previous history. The result shows that SPEED achieves an 88.3% prediction accuracy, which is better than LeZi Update, Active LeZi, IPAM, and C4.5.

Hardware prototyping of an intelligent current dq PI controller for FOC PMSM drive

Field Oriented Control (FOC) Permanent Magnet Synchronous Motor (PMSM) is a commutator less servo drive which provides high controllability, greater efficiency, superior torque to inertia ratio and high power density. However, the performance of FOC-PMSM depends on the driver circuits, which requires expensive computing elements. Besides, an intelligent current regulator is desired for a highly precise driver. This research proposed a hardwire prototype of current dq PI controller as a part of real-time hardwired motion intelligent driver which was previously solved using software and firmware dependent modules. The outcome will be a single chip current dq PI controller for FOC-PMSM drive.

CMOS Differential Ring Oscillators: Review of the Performance of CMOS ROs in Communication Systems

The integrated differential ring oscillator (DRO) in complementary metal oxide semiconductor (CMOS) technology has been used in numerous products for a long time. Its presence has been extended to high-speed clock and data recovery (CDR) circuits for optical communication, analog and digitally controlled oscillators, frequency dividers of high-frequency synthesizers, clock generators of digital circuits, analog-to-digital converters (ADCs), and many more applications [1]-[5]. Implementations of these ring oscillators are seen in emerging technologies such as ultrawideband (UWB) and radio frequency identification (RFID) as well as wireless sensor networks (WSNs) and short-range communication devices [6], [7]. The DRO is a good design choice for integrated circuit (IC)designers because of its continued use in different bulk CMOS technologies. This article presents implementation techniques and performance comparisons of the DRO as a CMOS voltage-controlled oscillator (VCO) in low radio frequency (RF) bands, along with presentation and discussion of a number of circuit approaches.

A modified-set partitioning in hierarchical trees algorithm for real-time image compression

Among all algorithms based on wavelet transform and zerotree quantization, Said and Pearlman’s set partitioning in hierarchical trees (SPIHT) algorithm is well known for its simplicity and efficiency. SPIHT’s high memory requirement is a major drawback to hardware implementation. In this study, we present a modification of SPIHT named modified SPIHT (MSPIHT), which requires less execution time at a low bit rate and less working memory than SPIHT. The MSPIHT coding algorithm is modified with the use of one list to store the coordinates of wavelet coefficients instead of three lists of SPIHT; defines two terms, number of error bits and absolute zerotree; and merges the sorting pass and the refinement pass together as one scan pass. Comparison of MSPIHT with SPIHT on different test image shows that MSPIHT reduces execution time at most 7 times for coding a 512 × 512 grayscale image; reduces execution time at most 11 times at a low bit rate; saves at least 0.5625 MB of memory; and reduces minor peak signal-to noise ratio (PSNR) values, thereby making it highly promising for real-time and memory limited mobile communications.