Man Hon Samuel Owen

Crystal structure and epitaxial relationship of Ni4InGaAs2 films formed on InGaAs by annealing

The structural, compositional, and electrical properties of epitaxial Ni4InGaAs2 (denoted as Ni-InGaAs) film formed by annealing sputtered Ni film on InGaAs were investigated. It was found that Ni-InGaAs adopts a NiAs (B8) structure with lattice parameters of a = 0.396 ± 0.002 nm and c = 0.516 ± 0.002 nm, and exhibits an epitaxial relationship with InGaAs, with orientations given by Ni-InGaAs[1¯10]//InGaAs[001] and Ni-InGaAs[110]//InGaAs[110]. The epitaxial Ni4InGaAs2 film has bulk electrical resistivity of ∼102 μΩ·cm, which increases as the film thickness scales below 10 nm. The results of this work would be useful for the development of contact metallization for high mobility InGaAs metal-oxide-semiconductor field-effect transistors.

Band alignment of HfO2/Al0.25Ga0.75N determined by x-ray photoelectron spectroscopy: Effect of SiH4 surface treatment

The band-alignment of atomic layer deposited (ALD)-HfO2/Al0.25Ga0.75N was studied by high resolution x-ray photoelectron spectroscopy measurements for both the non-passivated and SiH4 passivated AlGaN surfaces. The valence band offset and the conduction band offset for the ALD-HfO2/Al0.25Ga0.75N interface were found to be 0.43 eV and 1.47 eV, respectively, for the non-passivated sample, and 0.59 eV and 1.31 eV, respectively, for the SiH4-passivated sample. The difference in the band alignment is dominated by the band bending or band shift in the AlGaN substrate as a result of the different interlayers formed by the two surface preparations.

AlGaN/GaN Metal-Oxide-Semiconductor High-Electron-Mobility Transistors with a High Breakdown Voltage of 1400 V and a Complementary Metal-Oxide-Semiconductor Compatible Gold-Free Process

This paper reports the fabrication and characterization of AlGaN/GaN-on-sapphire metal–oxide–semiconductor high-electron-mobility transistors (MOS-HEMTs) using a complementary metal–oxide–semiconductor (CMOS) compatible gold-free process. Devices with a gate-to-drain spacing LGD of 20 µm achieved an off-state breakdown voltage VBR of 1400 V and an on-state resistance Ron of 22 mΩcm2. This is the highest VBR achieved so far for gold-free AlGaN/GaN MOS-HEMTs. In addition, high on/off current ratio Ion/Ioff of ~109 and low gate leakage current IG of ~10-11 A/mm were also obtained.

N-channel InGaAs field-effect transistors formed on germanium-on-insulator substrates

InGaAs n-channel metal oxide semiconductor field-effect transistors (MOSFETs) were fabricated on germanium-on-insulator (GeOI) substrate for the first time. Integration of InGaAs on a GeOI substrate was achieved using a molecular beam epitaxy (MBE)-grown InAlAs graded buffer. The fabricated MOSFET, with a self-aligned Ni–InGaAs metallic source/drain, achieves good device characteristics. The normalized transconductance (Gmtox) compares very well with reported data for InGaAs n-MOSFETs formed on bulk InP substrates, and is significantly higher than reported data for In0.53Ga0.47As n-MOSFETs fabricated on Si substrates using a similar growth technique.

InAlP-Capped (100) Ge nFETs with 1.06 nm EOT: Achieving record high peak mobility and first integration on 300 mm Si substrate

InAlP-capped Ge nFETs with sub-400 °C process modules were reported. Ge nFETs on Ge substrates with InAlP/Al2O3/HfO2 as gate dielectrics demonstrate the highest reported Ge (100) peak μeff for inversion mode devices. In addition, the gate stack with HfO2 directly deposited on the InAlP cap was implemented in Ge nFETs on 300 mm Si substrates for the first time. This leads to the realization of long-channel Ge nFETs with 1.06 nm EOT, high drive current, excellent S, and low gate leakage current. InAlP is a good passivation technique for Ge nFET gate stack formation, and could enable the use of Ge channel for both nFETs and pFETs in future high performance and low power logic applications.

Band alignment study of lattice-matched InAlP and Ge using x-ray photoelectron spectroscopy

Lattice-matched In0.49Ga0.51P was grown on a p-type Ge(100) substrate with a 10° off-cut towards the (111) by low temperature molecular beam epitaxy, and the band-alignment of In0.49Ga0.51P on Ge substrate was obtained by high resolution x-ray photoelectron spectroscopy. The valence band offset for the InGaP/Ge(100) interface was found to be 0.64 ± 0.12 eV, with a corresponding conduction band offset of 0.60 ± 0.12 eV. The InGaP/Ge interface is found to be of the type I band alignment.

High performance Ge CMOS with novel InAlP-passivated channels for future sub-10 nm technology node applications

We report the first realization of high performance Ge CMOS using a novel InAlP passivation scheme. The large conduction band and valence band offsets between InAlP and Ge confine electrons and holes within the Ge channel for n-FETs and p-FETs, respectively. The InAlP cap reduces scattering due to high-K/InAlP interface traps and boosts carrier mobility. As a result, a record high electron mobility μ_EFF of ~958 cm²/V·s at N_INV of 6×10¹¹ cm^-2 was achieved for Ge(100) n-FETs, and a high peak hole mobility of ~390 cm²/V·s was obtained for Ge(100) p-FETs. High on-state currents I_ON of 39.5 μA/μm and 31.2 μA/μm were achieved at gate overdrive |V_GS-V_TH| = 1 V and |V_DS| = 1 V for the n-FETs and p-FETs, respectively, with a gate length L_G of ~3 μm. In addition, for the first time, this novel InAlP passivation technique was integrated into Ge n-FinFETs, and good control of short channel effects (SCEs) was achieved.

Effect of growth temperature on the epitaxy strain relaxation and the tilt of InxAl1−x As graded layer grown by solid-source molecular beam epitaxy

In this study, we investigate the effect of the molecular beam epitaxial growth temperature on the epilayer tilt and the strain relaxation in the InAlAs M-buffer layer when the In composition is varied linearly from 6 to 57% followed by an inverse grading to 52% where InAlAs is lattice-matched to InP. The samples grown at 420 and 500??C have final epilayer tilts of 0.66?0.68? about the axis towards , whereas the sample grown at 370??C has a smaller tilt of 0.15? about the axis but towards [1?1?0]. Cross-sectional transmission electron microscopy micrographs showed that the sample grown at 420??C has the lowest dislocation density (6???106?cm?2) compared with those grown at 370 and 500??C. The inversely graded layer in all samples was shown to be effective in reducing the strain that was accumulated during the forward graded layer. This resulted in close to fully relaxed epilayers (92?99%), which are necessary for the prevention of further occurrence of dislocation nucleation (an important criterion for subsequent device structure growth).

Band alignment of HfO2/In0.18Al0.82N determined by angle-resolved x-ray photoelectron spectroscopy

The band-alignment of atomic layer deposited (ALD)-HfO2/In0.18Al0.82N was studied by high resolution angle-resolved X-ray photoelectron spectroscopy measurements. The band bending near the HfO2/In0.18Al0.82N interface was investigated, and the potential variation across the interface was taken into account in the band alignment calculation. It is observed that the binding energies for N 1s and Al 2p in In0.18Al0.82N decreases and the corresponding extracted valence band offsets increases with increasing θ (i.e., closer to the HfO2/In0.18Al0.82N interface), as a result of an upward energy band bending towards the HfO2/In0.18Al0.82N interface. The resultant valence band offset and the conduction band offset for the ALD-HfO2/In0.18Al0.82N interface calculated was found to be 0.69 eV and 1.01 eV, respectively.

Growth temperature effects on graded In x Al 1−x As/GaAs buffer for metamorphic In 0.70 Ga 0.30 As/In 0.53 Al 0.47 As planar transistor on Ge-on-insulator(GeOI) substrate

This paper aims to investigate the effect of substrate temperature on molecular beam epitaxy-grown InxAl1-xAs graded buffer layer. Atomic force microscopy, cross-sectional transmission electron microscopy, and secondary ion mass spectroscopy are used for wafer characterization. TEM images are used to estimate the threading dislocation density in the wafer. To demonstrate the feasibility of this growth method for device integration, HEMT and HBT are also fabricated.