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Manoj Chirania

Xilinx

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Publication

Featured researches published by Manoj Chirania.

Archive | 2004

Lookup table circuit optionally configurable as two or more smaller lookup tables with independent inputs

Manoj Chirania; Venu M. Kondapalli

Archive | 2004

High performance programmable logic devices utilizing dynamic circuitry

Manoj Chirania; Venu M. Kondapalli

Archive | 2005

Programmable logic block with dedicated and selectable lookup table outputs coupled to general interconnect structure

Steven P. Young; Trevor J. Bauer; Manoj Chirania; Venu M. Kondapalli

Archive | 2005

Programmable logic block with carry chains providing lookahead functions of different lengths

Tien Pham; Manoj Chirania; Venu M. Kondapalli; Steven P. Young

Archive | 2005

Programmable lookup table with dual input and output terminals in shift register mode

Venu M. Kondapalli; Trevor J. Bauer; Manoj Chirania; Philip D. Costello; Steven P. Young

Archive | 2005

Programmable logic block having reduced output delay during RAM write processes when programmed to function in RAM mode

Manoj Chirania; Venu M. Kondapalli

Archive | 2005

Programmable logic block having improved performance when functioning in shift register mode

Venu M. Kondapalli; Manoj Chirania

Archive | 2005

Programmable lookup table with dual input and output terminals in RAM mode

Venu M. Kondapalli; Trevor J. Bauer; Manoj Chirania; Philip D. Costello; Steven P. Young

Archive | 2007

Circuits and methods of implementing flip-flops in dual-output lookup tables

Manoj Chirania; Martin L. Voogel

Archive | 2004

Method of measuring performance of a semiconductor device and circuit for the same

Manoj Chirania; Venu M. Kondapalli; Martin L. Voogel; Philip D. Costello

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Collaboration

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Venu M. Kondapalli

Xilinx

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Philip D. Costello

Xilinx

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Steven P. Young

Xilinx

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Martin L. Voogel

Xilinx

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Trevor J. Bauer

Xilinx

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Ramakrishna K. Tanikella

Xilinx

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Robert I. Fu

Xilinx

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Subodh Gupta

Xilinx

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Tien Pham

Xilinx

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Jason Helge Anderson

University of Toronto

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