Martin L. Voogel

Pass gate circuit with body bias control

One-time programmable poly-fuse circuit for implementing non-volatile functions in a standard sub 0.35 micron CMOS

Method and test circuit for developing integrated circuit fabrication processes

Non-volatile memory array using gate breakdown structures

Layout architecture and method for fabricating PLDs including multiple discrete devices formed on a single chip

PLD lookup table including transistors of more than one oxide thickness

Non-volatile memory array using gate breakdown structure in standard sub 0.35 micron CMOS process

Non-volatile storage for standard CMOS integrated circuits

Integrated circuit multiplexer including transistors of more than one oxide thickness

Single event upset in SRAM cells in FPGAs with leaky gate transistors