Manu Jamnadas Tejwani

Si/Si 1−x Ge x p-Channel Mosfets Fabricated Using a Gate Quality Dielectric Process

The use of Si 1−x Ge x alloys for p-channel high transconductance MOSFETs requires a high quality dielectric system. Direct oxidation of Si 1−x Ge x alloys or even low temperature deposition of SiO 2 directly on Si 1−x Ge x results in a very high interface state density. We show that low interface state densities (below 10 11 eV −1 cm −2 ) can be obtained using both thermal and PECVD oxides through the use of a thin (6–8 nm) Si cap between the oxide and the Si 1-x Ge x layer. The Si cap layer leads to a sequential turn-on of the Si 1−x Ge x channel and the Si cap channel, as clearly observed in low temperature C-V curves. We show that this dual channel structure can be designed to suppress the parasitic Si cap channel. High quality, fully isolated Si 1−x Ge x p-channel MOSFETs have been fabricated in an integrable, low Dt process using both thermal or PECVD gate oxides and selective UHV/CVD for the Si/ Si 1−x Ge x channels. We show that optimally designed Si/Si 1−x Ge x MOSFETs exhibit up to 70% higher transconductance at 300K than control Si devices fabricated on n-doped 10 17 /cm 3 Si substrates. Si/Si 1−x Ge x p-channel MOSFETs with thermal and PECVD gate oxides show comparable device characteristics.

The Dependence of ETCH Pit Density on the Interfacial Oxygen Levels in Thin Silicon Layers Grown by Ultra High Vacuum Chemical Vapor Deposition

For low temperature silicon epitaxy it is not only important to have an oxygen free environment during growth but also an initial silicon surface free of trace concentrations of oxygen, carbon and other impurities. Variations in the pre-clean process (using the standard ex-situ aqueous hydrofluoric acid dip) used for ultra high vacuum chemical vapor depostion (UHVCVD) of silicon, result in interfacial oxygen levels ranging from 2 × 10 12 atoms/cm 2 to 10 14 atoms/cm 2 as measured by secondary ion ion mass spectroscopy (SIMS). Using a dilute Schimmel etch we have delineated the dislocations in the thin silicon epitaxial layers grown by UHVCVD. Correlation of the etch pit density to the interfacial oxygen levels suggests a power law dependence. Plausibility arguments are presented to explain this power law dependence.