Seshadri Subbanna

Self-aligned SiGe NPN transistors with 285 GHz f/sub MAX/ and 207 GHz f/sub T/ in a manufacturable technology

This paper reports on SiGe NPN HBTs with unity gain cutoff frequency (f/sub T/) of 207 GHz and an f/sub MAX/ extrapolated from Masons unilateral gain of 285 GHz. f/sub MAX/ extrapolated from maximum available gain is 194 GHz. Transistors sized 0.12/spl times/2.5 /spl mu/m/sup 2/ have these characteristics at a linear current of 1.0 mA//spl mu/m (8.3 mA//spl mu/m/sup 2/). Smaller transistors (0.12/spl times/0.5 /spl mu/m/sup 2/) have an f/sub T/ of 180 GHz at 800 /spl mu/A current. The devices have a pinched base sheet resistance of 2.5 k/spl Omega//sq. and an open-base breakdown voltage BV/sub CEO/ of 1.7 V. The improved performance is a result of a new self-aligned device structure that minimizes parasitic resistance and capacitance without affecting f/sub T/ at small lateral dimensions.

SiGe HBTs with cut-off frequency of 350 GHz

This work reports on SiGe HBTs with f/sub T/ of 350 GHz. This is the highest reported f/sub T/ for any Si-based transistor as well as any bipolar transistor. Associated f/sub max/ is 170 GHz, and BV/sub CEO/ and BV/sub CBO/ are measured to be 1.4 V and 5.0 V, respectively. Also achieved was the simultaneous optimization of f/sub T/ and f/sub max/ resulting in 270 GHz and 260 GHz, with BV/sub CEO/ and BV/sub CBO/ of 1.6 V and 5.5 V, respectively. The dependence of device performance on bias condition and device dimension has been investigated. Considerations regarding the extraction of such high f/sub T/ and f/sub max/ values are also discussed.

A 0.18 /spl mu/m BiCMOS technology featuring 120/100 GHz (f/sub T//f/sub max/) HBT and ASIC-compatible CMOS using copper interconnect

A BiCMOS technology is presented that integrates a high performance NPN (f/sub T/=120 GHz and f/sub max/=100 GHz), ASIC compatible 0.11 /spl mu/m L/sub eff/ CMOS, and a full suite of passive elements. Significant HBT performance enhancement compared to previously published results has been achieved through further collector and base profile optimization guided by process and device simulations. Base transit time reduction was achieved by simultaneously increasing the Ge ramp and by limiting the base diffusion with the addition of carbon doping to SiGe epitaxial base. This paper describes IBMs next generation SiGe BiCMOS production technology targeted at the communications market.

A 210-GHz f/sub T/ SiGe HBT with a non-self-aligned structure

A record 210-GHz f/sub T/ SiGe heterojunction bipolar transistor at a collector current density of 6-9 mA//spl mu/m/sup 2/ is fabricated with a new nonself-aligned (NSA) structure based on 0.18 /spl mu/m technology. This NSA structure has a low-complexity emitter and extrinsic base process which reduces overall thermal cycle and minimizes transient enhanced diffusion. A low-power performance has been achieved which requires only 1 mA collector current to reach 200-GHz f/sub T/. The performance is a result of narrow base width and reduced parasitics in the device. Detailed comparison is made to a 120-GHz self-aligned production device.

Foundation of rf CMOS and SiGe BiCMOS technologies

This paper provides a detailed description of the IBM SiGe BiCMOS and rf CMOS technologies. The technologies provide high-performance SiGe heterojunction bipolar transistors (HBTs) combined with advanced CMOS technology and a variety of passive devices critical for realizing an integrated mixed-signal system-on-a-chip (SoC). The paper reviews the process development and integration methodology, presents the device characteristics, and shows how the development and device selection were geared toward usage in mixed-signal IC development.

40 Gbit/sec circuits built from a 120 GHz f/sub T/ SiGe technology

Product designs for 40 Gbit/sec applications fabricated from SiGe BiCMOS technologies are now becoming available. This paper will briefly discuss technology aspects relating to HBT device operation at high speed, acting to dispel some common misconceptions regarding SiGe HBT technology applicability to 40 Gbit/sec circuits. The high speed portions of the 40 Gbit/sec system are then addressed individually, demonstrating substantial results toward product offerings, on each of the critical high speed elements.

Optimization of SiGe HBT technology for high speed analog and mixed-signal applications

SiGe HBTs have achieved record peak f/sub T/ values values and impressive digital circuit ECL RO delays but no analog circuit results have been reported. In this work we investigate the leverage of SiGe HBTs for analog circuits by optimizing the Ge-profile for a high /spl beta/V/sub A/ product and high f/sub T/ under the constraint of breakdown voltage and effective strain of the SiGe layer. Analytical calculations of /spl beta/, V/sub A/, and f/sub T/ of SiGe-HBTs as a function of Ge profile predict the largest performance advantage over Si BJTs for the most steeply graded Ge profile. SiGe-HBT transistors are fabricated with /spl beta/V/sub A/ products of 6160 V, BV/sub CEO/ of 3.5 V and f/sub max/ of 46 GHz, and compared to Si-BJTs fabricated with the same process. Digital performance is benchmarked by an ECL ring oscillator delay of 17.2 psec. The leverage for analog technology is demonstrated by fabrication of a 1 GHz SiGe-HBT 12 bit Digital to Analog Convertor.<<ETX>>

Measurement and modeling of thermal resistance of high speed SiGe heterojunction bipolar transistors

Thermal resistance has been measured for high speed SiGe HBTs with various emitter widths and lengths. The smaller devices exhibited higher thermal resistance values, but eventually resulted in lower junction temperature rise for a given power density. A physical model has been developed which showed good agreement with the measurements. The model indicates that the thermal resistance depends strongly on the deep trench geometry. The thermal resistance is also anticipated to increase with the existence of adjacent devices due to a heat dissipation interference, according to the model.

Transistor design and application considerations for >200-GHz SiGe HBTs

SiGe HBT transistors achieving over 200 GHz f/sub T/ and f/sub MAX/ are demonstrated in this paper. Techniques and trends in SiGe HBT design are discussed. Processing techniques available to silicon technologies are utilized to minimize parasitic resistances and capacitances and thereby establish raw speeds exceeding III-V devices despite the higher mobility in those materials. Higher current densities and greater avalanche currents, which are required for establishing such high performance, are discussed as they relate to device self-heating and reliability and the degradation of the devices. Simple circuit results are shown, demonstrating 4.2-ps ring-oscillator delays.

A 0.18 /spl mu/m 90 GHz f/sub T/ SiGe HBT BiCMOS, ASIC-compatible, copper interconnect technology for RF and microwave applications

We present a self-aligned, 0.18 /spl mu/m emitter width SiGe HBT with f/sub T/ of 90 GHz, f/sub MAX/ of 90 GHz (both at V/sub CB/=0.5 V), NF/sub MIN/ of 0.4 dB, and BV/sub CEO/ of 2.7 V. We also demonstrate that this device is integrable with IBMs 0.18 /spl mu/m, 1.8/3.3 V copper metallization CMOS technology with little effect on the CMOS device properties and design rules.