Manuel F. M. Barros

Analog circuits optimization based on evolutionary computation techniques

This paper presents a new design automation tool, based on a modified genetic algorithm kernel, in order to improve efficiency on the analog IC design cycle. The proposed approach combines a robust optimization with corner analysis, machine learning techniques and distributed processing capability able to deal with multi-objective and constrained optimization problems. The resulting optimization tool and the improvement in design productivity is demonstrated for the design of CMOS operational amplifiers.

Analog Circuits and Systems Optimization based on Evolutionary Computation Techniques

The microelectronics market trends present an ever-increasing level of complexity with special emphasis on the production of complex mixed-signal systems-on-chip. Strict economic and design pressures have driven the development of new methods to automate the analog design process. However, and despite some significant research efforts, the essential act of design at the transistor level is still performed by the trial and error interaction between the designer and the simulator. This book presents a new design automation methodology based on a modified genetic algorithm kernel, in order to improve efficiency on the analog IC design cycle. The proposed approach combines a robust optimization with corner analysis, machine learning techniques and distributed processing capability able to deal with multi-objective and constrained optimization problems. The resulting optimization tool and the improvement in design productivity is demonstrated for the design of CMOS operational amplifiers.

GA-SVM feasibility model and optimization kernel applied to analog IC design automation

An efficient use of macromodeling techniques is pointed out as an effective approach to improve the convergence and speed of the optimization process. The methodology presented in this paper is based on a learning scheme using Support Vector Machines(SVMs) that together with and an evolutionary strategy is used to create efficient models to estimate and optimize the performance parameters of analog and mixed-signal ICs. The SVM is used to identify the feasible design space regions while at the same time the evolutionary techniques are looking for the global optimum. Finally, the proposed optimization based methodology is demonstrated for the design of a well known class of CMOSoperational amplifier topologies. The efficiency of the proposed approach is compared with standard and modified genetic algorithm kernels.

An evolutionary optimization kernel with adaptive parameters applied to analog circuit design

This paper presents a new evolutionary optimization kernel applied to the automatic synthesis of high performance analog and mixed-signal ICs. This enhanced evolutionary approach is based on a modified genetic algorithm with self adaptive parameters tailored to efficiently control the optimization process. Particularly, the benefits introduced by self adaptive parameters consist of, first, reducing the problem complexity by using a grid with an adaptive resolution or step to describe the search space, then, improving the circumvention of local minima by including an adaptive mutation operator. The enhanced optimization kernel were tested for a broad range of well known test functions and compared to other approaches using MATLAB. Finally, the proposed optimization-based approach is demonstrated for the design of high-performance differential amplifiers using HSPICE as the evaluation engine.

Analog Circuit Design Based on Robust POFs Using an Enhanced MOEA with SVM Models

In this chapter, a multi-objective design methodology for automatic analog integrated circuits (IC) synthesis, which enhances the robustness of the solution by varying technological and environmental parameters, is presented. The automatic analog IC sizing tool GENOM-POF was implemented and used to demonstrate the methodology, and to verify the effect of corner cases on the Pareto optimal front (POF). To enhance the efficiency of the tool, a supervised learning strategy, which is based on Support Vector Machines (SVM), is used to create feasibility models that efficiently prune the design search space during the optimization process, thus, reducing the overall number of required evaluations. The GPOF-SVM optimization kernel consists of a modified version of the multi-objective evolutionary algorithm (MOEA), NSGA-II, and uses HSPICE® as the evaluation engine. The usage of standard inputs and outputs eases the integration with other design automation tools, either at system level or at physical level, which is the case of LAYGEN, an in-house layout generation tool. Finally, the approach was validated using benchmark examples, which consist of circuits tested with similar tools, particularly, the former GENOM tool and other tools from literature.

GA-SVM Optimization Kernel applied to Analog IC Design Automation

This paper presents a circuit/system level synthesis and optimization approach based on a learning scheme using support vectors machines (SVMs) and evolutionary strategies applied to the design of analog and mixed-signal ICs. This approach combines the best qualities of these two techniques, a robust classification and regression method and a powerful global optimization. The SVM is used to dynamically model performance space and identify the feasible design space regions while at the same time the evolutionary techniques are looking for the global optimum. Finally, the proposed optimization-based approach is demonstrated for the design of some analog circuits using HSPICE as the evaluation engine.

Enhanced genetic algorithm kernel applied to a circuit-level optimization E-design environment

This paper presents a circuit/system-level optimization E-Design environment based on an enhanced modified genetic algorithm kernel. The presented approach improves the standard genetic algorithm implementation by including automatic search space decomposition, premature convergence prevention procedures and distributed processing features. In order to cover a broad range of solutions in terms of circuit/system complexity within a realistic execution time both behavioral simulation, using equation-based descriptions, and electrical simulation, using Spice-like simulators, are considered. Moreover, an E-Design front-end allowing an incremental growth of the IC design database, an individual management of each project and the widespread training on the design flow procedures is being developed. Finally, the achieved increase on optimization efficiency, compared to a standard genetic algorithm implementation, as well as the general purpose of the described approach are illustrated by a multiobjective, multi-constraint optimization of some well known circuits.

Enhancing analog IC design optimization kernels with simple fuzzy models

This paper addresses the analog integrated circuit design automation by proposing an innovative circuit-level optimization kernel. The proposed approach, first, models analog design knowledge using soft computing techniques, than, enhances a stochastic optimization kernel by embedding the design knowledge model. The proposed approach uses common IC design environments and is validated for well known design examples.

AIDA: Analog IC Design Automation based on a Fully Configurable Design Hierarchy and Flow

This paper presents a new design automation environment to support analog IC design. The proposed approach introduces an increased level of flexibility and reusability when compared to traditional approaches. The flexibility is achieved by both allowing the designer to define its own hierarchical design organization and, simultaneously, the design flow for each design. The reusability is achieved by introducing an highly organized data structure to store the entire design data allowing an easy reuse and retargeting of pre-design systems and predefined design flows. Finally, a case study is presented to illustrate the functionality of the described design automation environment.

An evolutionary optimization kernel using a dynamic GA-SVM model applied to analog IC design

In this paper a new design automation approach to the problem of sizing analog ICs is described. The proposed approach employs a dynamic learning scheme, based on Support Vector Machines (SVMs), which together with an evolutionary strategy is used to create feasibility models to efficiently prune the design search space during the optimization process. The proposed approach is demonstrated for the design of CMOS operational amplifiers.