Marcel Heerman

CIMID, a technology for high density integration of electronic systems

CIMID stands for chip In Moulded interconnect &vice [I]. This new technology is a combination of moulded 3D-interconnections (SIL@)[2], chip-on-board (COB) and MCM-D E31 technology. A schematic view of a module cross-section is shown in figure 1. Substrate features such as cavities for attaching bare die and via holes are directly realised by the moulding process. As moulding tecfitlology is used, additional € t z ” s such as connectors and special substrate shapes may be integrated. The thermoplastic substrates are metallised using printed circuit board techniques. Patterning of the non-planar surfaces is performed by laser imaging. A thin film dielectric is applied and patterned on this substrate. Photosensitive BCB is used for this application because of its low curing temperature. On top of this dielectric layer, a thin film metallisation is applied. Because of the small via size in the dielectric layer and the small conductor width in the thin film metailisation, a high wiring densiry is obtained. Furthermore, as cavities are used for mounting the devices, a very thin circuit can be realised. Because of all these features, CIMID technology offers the possibility to integrate a complex electronic system on a single substrate with small dimensions.

Parametric compact models for the 72-pins polymer stud grid array™

A compact model or thermal resistor network of a 72-pins polymer stud grid array (PSGA) assembly is presented. A general thermal network is simplified to a compact model with seven resistors. Secondly, the effect of the chip dimensions on the different thermal resistors is investigated. Thirdly, the compact models are synthesized in a response surface model (RSM). Any customer can then calculate the compact model for his specific application by filling in the geometry properties of the package in the RSM-equations and calculating the maximal temperature in the assembly.

Thermal fatigue analysis of the flip-chip assembly on the Polymer Stud Grid Array (PSGA/sup TM/) package

In this paper, the attention is focused on the thermomechanical modelling of a new type of area array package: the Flip Chip on Polymer Stud Grid Array (PSGA/sup TM/). The objective of this study is to optimise the material and geometrical design of this PSGA package and the flip chip assembly in order to achieve the highest thermal fatigue reliability for the solder joints in this structure. A parameterised non linear finite element model is used to calculate the inelastic strains induced in the solder joints due to thermal cycling. The techniques of Design Of Experiments (DOE) and Response Surface Modelling (RSM) enhance the parameter sensitivity analysis and optimisation of the PSGA design. After the optimisation of the structure, a very high solder joint fatigue reliability of this flip chip to PSGA package has been achieved.

Thermal and Thermo-Mechanical Evaluation of a ‘Chip in Moulded Interconnect Device’

In this paper, a thermal and thermo-mechanical evaluation study of a new packaging approach, called CIMID (Chip in Moulded Interconnect Device), will be presented. The thermal performance of a prototype CIMID structure has been investigated by means of finite element analysis and experimental thermal characterisation techniques. Thermally induced stresses were calculated for a uniform cooling condition, which simulated the cooling down process after the encapsulation and curing process. The thermo-mechanical behaviour of the CIMID assembly was compared to those of a chip on PCB assembly.