Marcelo Negreiros

INL and DNL estimation based on noise for ADC test

This paper presented the linearity characterization of an analog-to-digital converter. The input signal is noise, which allows low analog area overhead for Built In Self Test (BIST). The linearity errors estimation is proposed based on the spectral analysis of only the output of the converter. This paper presents the underlying theory and practical results supporting the effectiveness of the proposed method.

Low cost analogue testing of RF signal paths

A low cost method for testing analogue RF signal paths suitable for BIST implementation in a SoC environment is described. The method is based on the use of a simple and low-cost one-bit digitizer that enables the reuse of processor and memory resources available in the SoC, while incurring little analogue area overhead. The proposed method also allows a constant load to be observed by the circuit, since no switches or muxes are needed for digitizing specific test points. Mathematical background and experimental results are presented in order to validate the test approach.

A new adaptive analog test and diagnosis system

This paper presents a low-cost analog test system with diagnosis capabilities. The tester is able to detect faults in any linear circuit by learning a reference circuit behavior in a first step, and comparing this behavior against the output of the circuit under test in a second step. For a faulty circuit, a third step takes place to locate the fault. The diagnosis method consists in injecting probable faults in a mathematical model of the circuit, and later comparing its output with the output of the real faulty circuit. This system has been successfully applied to a case study, a biquad filter. Soft, large, and hard deviations on components, as well as faults in operational amplifiers, were considered. Experimental results have proven the feasibility and efficiency of the proposed test and diagnosis system.

A statistical sampler for a new on-line analog test method

In this work a new strategy to the on-line test of analog circuits is presented. The technique presents a very low analog overhead and it is completely digital. For the System-on-Chip (SoC) environment, this allows the implementation of on-line test using processing power already present in the system. As all the signal processing is done in the digital domain, it allows use of a purely digital tester or a digital BIST technique. The main principle of operation is based on the observation of statistical properties of the circuit under test. Due to the low analog power and performance overhead, the proposed technique can be used to analyze the output of several stages of complex analog systems without the use of switches or analog multiplexors, as no additional AD converter is needed. This paper presents the fundamentals of the proposed test method and some preliminary results concerning linear analog systems.

Ultra low cost analog BIST using spectral analysis

In this work, a low cost method to implement an analog BIST scheme for the system on chip environment is presented. The method is based on spectral analysis and it is entirely digital. A simple and low cost 1-bit digitizer is used to capture analog information without the need for an AD converter or oversampling techniques. It also allows partitioning of the analog circuit for test thanks to the low analog area overhead of the digitizer. The mathematical framework and a test example are presented, with practical results illustrating limitations and advantages of the proposed technique.

Detecting faults in rotating machines

Maintenance and repair tasks that follow established procedures reduce the chances of unexpected failure and the consequent losses in production, time, and money. In some critical cases, failure in a process can cause serious damage or even endanger human lives. We have developed a fuzzy logic system to diagnose the operation of rotating machines and help improve maintenance and repair procedures.

A Statistical Sampler for a New On-Line Analog Test Method

This work shows a new strategy to the on-line test of analog circuits. The technique presents a very low analog overhead and it is completely digital. In the System-on-Chip (SoC) environment the on-line test can be developed by using processing power already available in the system. As all the signal processing is done in the digital domain, it allows use of a purely digital tester or a digital BIST technique. The main principle of operation is based on the observation of statistical properties of the circuit under test. Since it has low analog power and performance overhead, the proposed technique can be used to analyze the output of several stages of complex analog systems without the use of switches or analog multiplexors for reconfiguration, and no additional AD converter is needed. This paper presents the fundamentals of the proposed test method and some experimental results illustrating the operation of the Statistical Sampler concerning linear analog systems.

A noise generator for analog-to-digital converter testing

This paper describes the implementation of a white noise generator to be used as the input signal of a new method for testing analog-to-digital converters in order to detect and to evaluate integral and differential nonlinearity errors. The main goal of this method is to avoid the comparison of the analog-to-digital output with a known and very precise reference input. The proposed white noise generator is easily implemented, and can reduce the complexity of generating other excitation signals. The proposed innovative method uses noise as the excitation signal. The use of this kind of signal avoids concerns about the inherent noise present in all electronic systems. The testing technique is based on the analysis of the spectral response of the ADC output. This paper covers the generation of the excitation signal, and simulation and practical results are presented to prove the efficiency of the method.

An Improved RF Loopback for Test Time Reduction

In this work a method to improve the loopback test used in RF analog circuits is described. The approach is targeted to the SoC environment, being able to reuse system resources in order to minimize the test overhead. An RF sampler is used to observe spectral characteristics of the RF signal path during loopback operation. While able to improve the observability of the signal path, the method also allows faster diagnosis than conventional loopback tests, as the number of transmitted symbols can be greatly reduced. Practical results for a prototyped RF link at 860MHz are presented in order to demonstrate the relevance of the method

Ultimate low cost analog BIST

In this work a BIST method for linear analog circuits with very low cost and the smallest possible analog overhead area is presented. The method is suitable to be implemented in the SoC environment, as it allows the reuse of resources already available in the system, and it is essentially digital. Theoretical background is provided, and experimental results demonstrate the advantages and limits of the proposed approach.