Marco Berkhout

An integrated 200-W class-D audio amplifier

An integrated stereo class D audio power amplifier realized in an SOI based BCD technology is presented. The limiting factor in the performance of class D amplifiers is the quality of the switching power stage. In this paper a new high-speed, low-current levelshifter and a robust deadtime control arrangement are presented that are essential for a high quality switching power stage.

Class-D Audio Amplifiers in Mobile Applications

A comparative system-level overview is given of alternative class-D amplifier architectures. The theory behind pulsewidth modulation and different modulation schemes is discussed. Topological alternatives such as open-loop versus feedback and fixed-carrier versus self-oscillating are analyzed and compared in terms of relevant characteristics, such as distortion, power supply rejection, efficiency, and electromagnetic interference. The combination of digital-to-analog conversion and class-D amplifiers is discussed. Experimental results of an integrated circuit based on a simple architecture that combines the benefits of digital input with an analog feedback loop are presented.

Integrated overcurrent protection system for class-D audio power amplifiers

A fully integrated overcurrent protection system is presented suitable for application in integrated class-D audio power amplifiers. Accurate overcurrent detection is used based on parallel measurement of the voltage drop across the DMOS power transistors. A logic circuit enables continuous current limiting during overload situations. Actual short circuits can be distinguished from load impedance minima using a simple short-circuit discrimination method.

A class D output stage with zero dead time

An integrated class-D output stage has been realized with zero dead time, thereby removing one of the dominant sources of distortion in class-D amplifiers. Dead time is eliminated through proper dimensioning of the power transistor drivers and accurate matching of switch timing. Open-loop distortion of this output stage stays below 0.1% up to 35 W.

Class-D audio amplifiers in mobile applications

A comparative system-level overview is given of alternative class-D amplifier architectures. The theory behind pulse-width modulation and different modulation schemes is discussed. Topological alternatives such as open-loop versus feedback, fixed-carrier versus self-oscillating are analyzed and compared in terms of relevant characteristics such as distortion, power supply rejection, efficiency and electro-magnetic interference. The combination of D/A conversion and class-D amplifiers is discussed.

Audio at low and high power

An overview is presented of recent developments in the analog boundaries of the audio chain. The main focus is on class-D amplifiers that are by now almost standard in consumer applications and emerging in automotive and mobile applications as well. Further, an overview of the state-of-the-art in A/D and D/A conversion is given.

A 3.4 W Digital-In Class-D Audio Amplifier in 0.14

In this paper a class-D audio amplifier for mobile applications is presented realized in a 0.14 μm CMOS technology tailored for mobile applications. The amplifier has a simple PDM-based digital interface for audio and control that requires only two pins and enables assembly in 9-bump WL-CSP. The complete audio path is discussed that consists of a Parser, Digital PWM controller, 1-bit DA-converters, analog feedback loop and the Class-D power stage. A reconfigurable gate driver is used that reduces quiescent current consumption and radiated emission.

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The trend in portable devices such as smart phones and tablets is towards higher audio output power. This can be achieved by lowering the speaker impedance or increasing the voltage swing at the amplifier output by boosting the supply voltage [1-4]. Typical speakers in portable devices are quite fragile and can be damaged easily when the voice coil temperature or membrane excursion exceeds the rated limits. This work presents a smart speaker driver system that maximizes acoustic output while ensuring the speaker is not damaged.

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Many class-D audio amplifiers use a reference clock to fix the PWM carrier frequency. The jitter of the reference clock can cause significant voltage noise at the amplifier output. In this paper a simple model is presented that allows accurate prediction of the noise contribution from an integrated regenerative sawtooth oscillator to the output noise of a class-D audio amplifier. The implementation of an oscillator in a class-D amplifier is presented and the model is verified with measurements.

A 4Ω 2.65W Class-D Audio Amplifier With Embedded DC-DC Boost Converter, Current Sensing ADC and DSP for Adaptive Speaker Protection

A 322 coefficient semi-digital FIR-DAC using a 1-bit PWM input signal was designed and implemented in a high voltage, audio power bipolar CMOS DMOS (BCD) process. This facilitates digital input signals for an analog class-D amplifier in BCD. The FIR-DAC performance depends on the ISI-resistant nature of this PWM-signal. An impulse response with only positive coefficients was chosen, because of its resistance to deadzone and mismatch. With a DAC current of 0.5 mA, the dynamic range is 111 dB (A-weighted), with SINAD = 103 dB (A-weighted). The current consumption is 1mA for the analog part and 4.8 mA for the digital part. The power consumption is 29 mW at V/sub dd/ = 5 V and the chip area is 2 mm/sup 2/ including the reference diode that can be shared by more channels.