Benno Krabbenborg

High current bond design rules based on bond pad degradation and fusing of the wire

Abstract In this paper design rules for maximum current handling capability of gold bond wires are derived based on two failure mechanisms: (1) fusing of the wire; and (2) degradation of the interface between gold bond balls and the aluminum bond pads under high current/high temperature stress. For determination of the fuse current as a function of the length an analytical model is used to calculate the temperature and power distribution in the wire as a function of the position. The current level at which the melt temperature of gold is reached is the fuse current. The degradation mechanism under high current stress (up to 2.5 A) was studied by in-situ monitoring of the gold bond ball–aluminum interconnect contact resistance under high current stress at various temperatures and stress currents. The cumulative failure distributions were used to fit a model for lifetime as a function of current and temperature that shows an order of magnitude difference in lifetime between positive and negative current stress. Finally, fuse current and the lifetime model result in data-driven high current design rules for bond pad and wire.

Fast temperature cycling and electromigration induced thin film cracking multilevel interconnection: experiments and modeling

There is an increasing reliability concern of thermal stress-induced and electromigration-induced failures in multilevel interconnections in recent years. This paper reports our investigations of thinfilm cracking of a multilevel interconnect due to fast temperature cycling and electromigration stresses. The fast temperature cycling tests have been performed in three temperature cycle ranges. The failure times aare represented well by a Weibull distribution. The distributions are relatively well behaved with generally similar slope (shape factor). The failure mechanism is well fitted by the Coffin-Manson equation indicating a uniform acceleration. The observation of cracking in the interlayre dielectric due to fast temperature cycling stress from failure analysis agrees well with the failure mechanism modeling and the calculated Coffin-Manson exponent. Electromigration experiments have shown that devices failed due to extrusion-shorts without increasing of resistance of metal line. The failure times are represented better by the Weibull distribution than by the lognormal distribution (normally used for electromigration data). A simulation of stress buil-up in metal line using an electromigration simulator confirmed that the cracking of interlayer dielectric is the weakest spot and most likely to cause electromigration failure.

A 4Ω 2.65W Class-D Audio Amplifier With Embedded DC-DC Boost Converter, Current Sensing ADC and DSP for Adaptive Speaker Protection

The trend in portable devices such as smart phones and tablets is towards higher audio output power. This can be achieved by lowering the speaker impedance or increasing the voltage swing at the amplifier output by boosting the supply voltage [1-4]. Typical speakers in portable devices are quite fragile and can be damaged easily when the voice coil temperature or membrane excursion exceeds the rated limits. This work presents a smart speaker driver system that maximizes acoustic output while ensuring the speaker is not damaged.

Robustness of LDMOS power transistors in SOI-BCD processes and derivation of design rules using thermal simulation

In SOI devices, the buried oxide alters the thermal impedance compared to a bulk device and a gives a higher temperature rise that influences the robustness of the device. In this paper, power LDMOS transistors (with integrated temperature sensors) in an SOI-process are evaluated with Safe Operating Area (SOA) measurements. The failure mechanism based on triggering of the parasitic bipolar, is discussed with the aid of dynamic temperature measurements. The results show that the failure energy can be related to a critical temperature rise that depends on V/sub DS/. Consequently, the thermal impedance and V/sub DS/ fully determine the failure energy. Hence, 3D thermal simulation can be used as a tool for dimensioning power transistors. A comparison of SOI-DMOS with bulk-DMOS and bulk-Bipolar shows that in SOI it is still very well possible to create power devices with a good SOA.

Closed-Loop Class-D Amplifier With Nonlinear Loop Integrators

In many integrated class-D audio amplifiers large linear capacitors are used to create the triangular reference signals for generation of PWM signals. In this paper, an integrated class-D amplifier is presented that uses a control loop with area efficient nonlinear gate oxide capacitors. A model is used to show that the nonlinearity does not degrade the THD performance. A comparison with a similar control loop using linear capacitors is made. Measurements and simulations on two amplifiers with linear and nonlinear capacitors confirm that nonlinear capacitors do not introduce additional distortion.

Protection of audio amplifiers based on temperature measurements in power transistors

An audio amplifier IC has been realized with protection circuitry based directly upon power-transistor temperature measurements. In contrast to current- or voltage-based measurements, this method gives optimal protection independent of supply voltage (9-28V), load (2-16/spl Omega/ BTL), ambient temperature and heat sinking.

Closed loop class-D amplifier with nonlinear loop integrators

In many integrated class-D audio amplifiers large linear capacitors are used to create the triangular reference signals for generation of PWM signals. In this paper, an integrated class-D amplifier is presented that uses a control loop with area efficient nonlinear gate oxide capacitors. A model is used to show that the nonlinearity does not degrade the THD performance. To limit the maximum voltage on the gate oxide capacitor, a method was used to prevent voltage drift of the integrator output in case the amplifier is clipping. This method also improves the clipping recovery behavior. Measurements and simulations on two amplifiers with linear and nonlinear capacitors confirm that nonlinear capacitors do not introduce additional distortion. Measurements on the amplifier with and without the clipping recovery method confirm the improvement in clipping recovery.

The influence of process variations on the robustness of an audio power IC

In audio power ICs for car stereo there is a continuous trend towards more output power under the restriction of the supply voltage of the car battery. Output currents of several amps per channel are required to drive 2x25 or even 4x25 Watt BTL in 4 /spl Omega/ loads. (BTL: Bridge Tied Load). The ICs must be protected against short circuits of the outputs to ground and the supply voltage. Another requirement is protection against loaddump pulses. Loaddump is a temporary peak in the supply voltage that occurs in the application when the car battery is disconnected while the engine running. The requirements on the robustness of these power ICs, especially the output stages with the power transistors, are very high. Therefore, process variations influencing the breakdown voltages can have a significant effect on the robustness of these ICs and their overstress susceptibility.