Mario Francisco Velez
Qualcomm
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Publication
Featured researches published by Mario Francisco Velez.
international frequency control symposium | 2012
Chengjie Zuo; Changhan H. Yun; Philip Jason Stephanou; Sang-June Park; Chi-Shun T. Lo; Robert Paul Mikulka; Je-Hsiung J. Lan; Mario Francisco Velez; Ravindra V. Shenoy; Jonghae Kim; Matthew Michael Nowak
For the first time in the development of piezoelectric micromechanical resonators, this paper presents a new class of cross-sectional dilation mode resonators (XDMR) that achieve unprecedentedly high electromechanical coupling constant: kt2 up to 10% for aluminum nitride (AlN) based resonators and 19% for zinc oxide (ZnO) based resonators. Detailed discussions on the geometry design, FEM simulation, and process challenge are provided in this paper to give insight on this novel high-kt2 piezoelectric resonator technology and, more importantly, guide the future development of mechanical resonators with coherent 2D/3D mode shapes.
electronic components and technology conference | 2015
Min Suk Kim; Sangbeom Cho; Junki Min; Markondeya Raj Pulugurtha; Nathan Huang; Srikrishna Sitaraman; Venky Sundaram; Mario Francisco Velez; Arjun Ravindran; Yogendra Joshi; Rao Tummala
This paper addresses the thermal dissipation of power amplifier (PA) chips, which is one of the biggest challenges in the development of ultra-miniaturized glass-based RF modules. Glass packages with 3D or double-side active and passive integration offer the best miniaturization and performance enhancement for RF modules because glass has ultra-low loss, dimensional stability for precision thinfilm components, ability to process through-vias in large panels to reduce cost. However, glass is a poor thermal conductor. Cooling of the high-power PA die with integrated miniaturized RF modules is, therefore, a key challenge. This paper provides extensive modeling studies of RF power amplifier modules with copper thermal vias in ultra-miniaturized glass, without additional process steps. It considers various power amplifier design options such as: Si vs. Silicon-on-Insulator (SOI); location of die hotspot; via geometry; and conformal vs. fully-filled vias, and provides optimal design recommendations with modeling and analysis.
Archive | 2016
Daeik Daniel Kim; David Francis Berdy; Mario Francisco Velez; Chengjie Zuo; Changhan Hobie Yun; Jonghae Kim
Archive | 2011
Justin Phelps Black; Ravindra V. Shenoy; Evgeni Petrovich Gousev; Aristotele Hadjichristos; Thomas Andrew Myers; Jonghae Kim; Mario Francisco Velez; Je-Hsiung Jeffrey Lan; Chi Shun Lo
Archive | 2013
Ravindra V. Shenoy; Kwan-Yu Lai; Philip Jason Stephanou; Mario Francisco Velez; Jonghae Kim; Evgeni Petrovich Gousev
Archive | 2013
Changhan Yun; Chengjie Zuo; Chi Shun Lo; Jonghae Kim; Mario Francisco Velez
Archive | 2012
Ravindra V. Shenoy; Kwan-Yu Lai; Jon Bradley Lasiter; Jonghae Kim; Mario Francisco Velez; Chi Shun Lo; Donald William Kidwell; Philip Jason Stephanou; Justin Phelps Black; Evgeni Petrovich Gousev
Archive | 2012
Chengjie Zuo; Changhan Yun; Sang-June Park; Chi Shun Lo; Mario Francisco Velez; Jonghae Kim
Archive | 2011
Chengjie Zuo; Changhan Yun; Chi Shun Lo; Wesley N. Allen; Mario Francisco Velez; Jonghae Kim; Sanghoon Joo
Archive | 2010
Yiming Li; Mario Francisco Velez; Shiqun Gu