Mario Pacheco

X-ray computed tomography for non-destructive failure analysis in microelectronics

In this paper a review of the development of x-ray computed tomography (CT) for non-destructive failure analysis in microelectronics is presented. The general operation principle, key design considerations and technical challenges faced by x-ray CT technology are discussed. A comparison between 2D and 3D x-ray imaging capabilities is presented, and critical failure analysis case studies that are hard or not possible to isolate by alternative methods are also discussed, as well as its unique progressive testing capability.

Detection and characterization of defects in microelectronic packages and boards by means of high-resolution x-ray computed tomography (CT)

In this paper a review of the development of x-ray computed tomography (CT) for non-destructive failure analysis in microelectronics packages and boards is presented. The general operation principle, key design considerations and technical challenges faced by x-ray CT technology are discussed. A comparison between 2D and 3D x-ray imaging capabilities is presented, and critical failure analysis case studies for first and second level interconnect that are hard or not possible to isolate by alternative methods are also discussed, as well as its unique progressive testing capability.

High resolution and fast throughput-time X-ray computed tomography for semiconductor packaging applications

The recent applications of 3D X-ray computed tomography (CT) in microelectronic packages, including nondestructive failure analysis, defect monitoring in solder joints and Cu vias, and progressive reliability study of solder voids, electron migration induced void nucleation in solder joints, and void evolution in Cu vias are reviewed. The high resolution and non-destructive 3D X-ray CT data has proven to be highly valuable in package assembly process development, quality control and reliability risk assessment; however, the field of view of current lab-scale 3D X-ray CT technology is limited to about 1-2mm2 localized area at micron level resolution, due to its low brightness and nonparallel X-ray beam resulting in long data acquisition time. Synchrotron X-ray sources, on the other hand, can provide large area collimated beams with high brightness, which allows imaging within 3-20 minutes an entire 3D package, including Si, underfill, multiple levels of solder joints, and dielectric layers, Cu vias as well as through holes in multiple substrates. The limitation of current 3D X-ray CT techniques as well as directions for next generation 3D X-ray CT techniques provided by the synchrotron X-ray study of 3D packages are discussed in this paper.

Using Synchrotron Radiation Microtomography to Investigate Multi-scale Three-dimensional Microelectronic Packages

Synchrotron radiation micro-tomography (SRµT) is a non-destructive three-dimensional (3D) imaging technique that offers high flux for fast data acquisition times with high spatial resolution. In the electronics industry there is serious interest in performing failure analysis on 3D microelectronic packages, many which contain multiple levels of high-density interconnections. Often in tomography there is a trade-off between image resolution and the volume of a sample that can be imaged. This inverse relationship limits the usefulness of conventional computed tomography (CT) systems since a microelectronic package is often large in cross sectional area 100-3,600 mm(2), but has important features on the micron scale. The micro-tomography beamline at the Advanced Light Source (ALS), in Berkeley, CA USA, has a setup which is adaptable and can be tailored to a samples properties, i.e., density, thickness, etc., with a maximum allowable cross-section of 36 x 36 mm. This setup also has the option of being either monochromatic in the energy range ~7-43 keV or operating with maximum flux in white light mode using a polychromatic beam. Presented here are details of the experimental steps taken to image an entire 16 x 16 mm system within a package, in order to obtain 3D images of the system with a spatial resolution of 8.7 µm all within a scan time of less than 3 min. Also shown are results from packages scanned in different orientations and a sectioned package for higher resolution imaging. In contrast a conventional CT system would take hours to record data with potentially poorer resolution. Indeed, the ratio of field-of-view to throughput time is much higher when using the synchrotron radiation tomography setup. The description below of the experimental setup can be implemented and adapted for use with many other multi-materials.

The mechanism and kinetic study of void migration in Cu vias under current flow by 3D X-ray computed tomography

Miniaturization and portability of consumer electronics is driving the substrate technology to enable packages with higher circuit density, smaller size, and lower Z height. Cu vias with large aspect ratio are being used for these next generation substrate technologies. Due to the relatively large aspect ratio of the Cu vias, voids could form during the electrolytic Cu filling process. To understand the void behavior under current flow, samples are subjected to high current at elevated temperatures. 3D X-ray computed tomography is used to characterize these voids in Cu vias before and during the test at intermediate readouts. These studies find that the voids accumulate and migrate preferentially to the applied bias polarity. The hypothesis of the void movement under current flow is discussed and the kinetics of the void migration is proposed with the estimations of activation energy and current density exponent.