Balu Pathangey

Lead-Free Solder Joint Void Evolution During Multiple Subsequent High-Temperature Reflows

Entrapment of volatiles during lead-free solder joint formation results in the creation of voids which may have a negative impact on the joints mechanical and/or electrical performances. According to IPC-J-STD-001E and IPC-A-610E specifications, the post-surface-mount-technology cumulative voiding criterion in lead-free solder joints is less than 25% for a second-level interconnect. For solder joints that experience multiple high-temperature reflow processes after completion of assembly, however, it is important to understand and predict how these voids will interact and evolve during subsequent high-temperature exposures. In this paper, both in situ 2-D X-ray imaging and 3-D X-ray tomography were used to study the growth kinetics of solder joint voids during multiple reflow cycles. The results demonstrate that voids grow and move during each reflow cycle. The growth kinetics has been shown to follow a diffusion-controlled mechanism based on a model for out-gassing bubble growth in a supersaturated molten solder liquid.

Application of TOFSIMS for Contamination Issues in the Assembly World

Within the assembly world, problems related to package contamination, which stem from material sourcing and assembly process excursions, can impact product reliability. From the reliability perspective, it is essential to achieve integrity at all internal interfaces in the flip-chip, wire-bond, and novel mixed technology packages. In many instances, both organic and low-level ionic contaminants have resulted in interface delamination, metal migration, microcracking, etc., which leads to a premature failure of products either in reliability tests or in the field. Several examples of failure analysis relating to package contamination in the assembly world and the effectiveness of time-of-flight secondary ion mass spectroscopy in isolating and understanding failures are highlighted in this paper.

Effect of metal contaminants in pre-gate oxide cleans for sub-100-nm devices

Metal contaminants at trace levels in the pre-gate oxide clean solutions have always been a concern with scaling down trends in CMOS-based devices. The effect of multielement contamination (alkali, transition, and noble metals up to 200 ppb levels) in dilute hydrofluoric acid (DHF), standard clean one (SC1), and standard clean two (SC2) solutions is investigated for an Intel Pentium-based sub-100-nm microprocessor technology. The main significance of this work is to achieve a rational specification for process chemical purity. Results from surface analyses of monitor wafers and device level electrical measurements of production scale wafers along with yield and reliability analyses are presented in this paper. Deposition of metallic contaminants from clean solutions has been explained qualitatively based on electrochemical theory of reduction potentials. Among the 35 elements investigated in this study, only platinum at very low parts-per-billion levels in the HF-based cleans has been found to affect the gate oxide integrity producing zero yield. An increase in the surface roughness (2-8/spl times/) was also observed with silicon monitor wafers for 100-ppb-platinum-contaminated DHF solutions and could play an important role in degrading the gate oxide performance. Other alkali and transition metals including copper up to 200 ppb levels in the HF-based cleans studied here did not show any deleterious effects in the gate oxide integrity and product reliability measurements. The effect of contamination in the SC1 and SC2 cleans was negligible even for 100 ppb platinum. Significant cost reduction can be realized by safely relaxing the process chemical contamination disposition limits for alkali and transition elements.

New Electrochemical Cell Designs and Test Methods for Corrosion Testing of the Components in Integrated Circuit Liquid Cooling Systems

This paper introduces new electrochemical cells and testing methods that are ideal for characterizing corrosion risk assessment of the components used for liquid cooling system with high surface to liquid volume ratio. Two cell configurations are described in this paper and they use three electrode and two electrode cells. These cells have the identical structure except for the number of electrodes. These cells are made by sandwiching the working electrode plate (sample) and the counter electrode plate (graphite) with a spacer (gasket), and by filling the cavity with the liquid under interest. In case of the three-electrode cell, the reference electrode is inserted through the hole in the graphite. The three-electrode cell is ideal for the quantitative characterization of the corrosion rate by utilizing conventional electrochemical techniques such as a Tafel method. The use of the two-electrode cell is similar to the case of the galvanic corrosion characterization as it measures the cell current that flows between the dissimilar metals that are in contact with the liquid. When coupled with computer assisted data acquisition, the two-electrode cell configuration allows the characterization of long-term corrosion reliability of a component with a variation in a large number of test variables. It is particularly useful in finding corrosion inhibitors.Copyright

Characterization of Novolac Based Photoresists to Fabricate 3D Polymer Dome Features

Wafer level, 3D, free standing structures (e.g., domes or hemi-cylinders) can be fabricated using polymer dome features as sacrificial templates for MEMS and interconnect applications. Understanding the kinetics of dome formation and the material properties are essential for a robust and manufacturable process of controlling the size and shape of the photoresist features. In this paper, temporal and thermal characteristics of Novolac based photoresists are presented as a function of solid loading and solvent type using analytical techniques such as Thermogravimetric Analysis (TGA), Fourier Transform Infrared (FTIR) spectroscopy, hot stage microscopy, and Gas Chromatography/ Mass Spectrometry (GC/MS). The solid loading influences the thickness and processing ability of the resist. The solvent evaporation rate controls the final size and shape of the 3D polymer dome features. Solvent is the primary material lost during the dome formation and the onset of deformation is dependent on temperature and ramp rate.Copyright

The Mechanism of Dense Interfacial Voids and Its Impact on Solder Joint Reliability

SAC 305 solder joints with ENIG and NiPdAu surface finishes are studied. In general, nano voids in Ni2SnP can be only seen in SAC 305/ENIG but not in SAC 305/NiPdAu. However, when trace amount of impurities are present in NiPdAu, very dense nano voids are observed in Ni2SnP. The voids formation mechanism related to interaction of interfacial impurities and vacancy flux towards the interface has been discussed to explain the observations. BGA ball shear test indicates the dense interfacial voids can degrade the solder joint strength dramatically.

Impact of corrosive environment on contact resistance of infrequently mated connectors

Separable connectors are commonly plated with gold for optimum electrical properties. In aggressive environments, gold provides adequate resistance for corrosion of underneath copper. Corrosion resistance has been historically studied by exposing the connectors to a mixture of corrosive gases through a mixed flowing gas (MFG) test. A few studies in the past claimed that contact electrical resistance can stay stable even in unplated samples if micromotion between the interfaces can be eliminated. However, contact force relaxation and micromotion can disturb the mating interface resulting in resistance increases. To understand the interactions between surface finish plating, end usage and micromotion under an aggressive environment, a DOE was planned with linear edge connectors in a MFG chamber. The effect of end usage was addressed through mated and unmated connector samples followed by electrical testing. The impact of mechanical force was studied by controlling the micromotion through a custom vibration fixture that was designed to operate within the MFG chamber. Results from our studies are expected to initiate efforts towards improving existing industry test standards with recommendation to consider the effects of mechanical retention and end usage in addition to plating material and thickness.

The mechanism and kinetic study of void migration in Cu vias under current flow by 3D X-ray computed tomography

Miniaturization and portability of consumer electronics is driving the substrate technology to enable packages with higher circuit density, smaller size, and lower Z height. Cu vias with large aspect ratio are being used for these next generation substrate technologies. Due to the relatively large aspect ratio of the Cu vias, voids could form during the electrolytic Cu filling process. To understand the void behavior under current flow, samples are subjected to high current at elevated temperatures. 3D X-ray computed tomography is used to characterize these voids in Cu vias before and during the test at intermediate readouts. These studies find that the voids accumulate and migrate preferentially to the applied bias polarity. The hypothesis of the void movement under current flow is discussed and the kinetics of the void migration is proposed with the estimations of activation energy and current density exponent.

Optimizing gold thickness of land grid array pads for cost, performance and reliability of connectors

Gold plated socket contact tips and substrate lands are commonly used in the electronics industry for optimum electrical properties. Increasing the gold thickness improves corrosion resistance and provides stable contact resistance at lower mechanical forces. However, with the ever increasing cost of gold it is critical to optimize the socket stack for cost, performance and reliability. To demonstrate this balance, a study on the stability of socket contact resistance was conducted at various gold thicknesses of substrate lands ranging from 60 to 400 nm using a single contact test setup. Contact forces were measured with a tri-axial force sensor that provided a means for extracting the coefficient of friction between the contact interface and substrate lands. An empirical model that relates the contact resistance to mechanical force and plating thickness was derived from the Force-Deflection-Resistance trends observed across various gold thicknesses. In this study, some of the plating options considered included a layer of Palladium (Pd) between the Nickel (Ni) and Gold (Au) layers to improve the corrosion resistance. The corrosion resistance was quantified by exposing the substrates to temperature, humidity and mixed flowing gas (MFG) chambers. The experimental findings could be used for optimization of the Gold plating thickness for cost, performance and reliability.

Evaluation of corrosion films on Cu and Ag reactive monitors deployed in data center server environments

Corrosion driven electronic hardware failures are a concern for data center and mission critical server applications. Increasing needs for ubiquitous computing has resulted in an explosive growth of data centers around the world. It has been observed that in emerging markets the contamination either from polluted air or through particulate matter gets inside the electronic systems impacting their long term reliability. The present work focuses on reactive monitoring of these environments using metallic coupons. Surface analysis of the corrosion films showed the presence of sulfide and chloride products for silver and predominantly oxides for copper. Not only did silver correlate well with locations susceptible to hardware corrosion failures they were less prone to polysiloxane contamination than copper and hence a better indicator of the corrosion risks.