Marko Hoyer

Proactive dynamic resource management in virtualized data centers

Dynamically reassigning virtual machines (VMs) to servers is a widely addressed idea to save energy in data centers. VMs are consolidated in times of low overall resource demand. Unused servers are switched off to save energy. Mainly two major challenges must be addressed to realize this approach. First, the resource demand of VMs expected in the future must be estimated to take care of delays caused by VM migrations and server startups. An upcoming resource shortage must have been resolved right before it actually occurs. Second, a scheduling algorithm is needed that, based on a current distribution of VMs to servers, can guarantee to find a sequence of operations that resolves any upcoming resource shortage right in time. Within this paper, we present a novel approach that addresses both of these challenges. In contrast to previous work, this approach can guarantee not to cause any resource shortages, if the actual resource demand of the VMs meets the expected one. We performed a simulation based evaluation with a set of VMs. The underlying resource demand time series were measured in a data center operated by a medium-sized IT service provider. A data center model was used to estimate the energy consumption. Overall energy savings of about 23% could be achieved compared to a static approach. Resource shortages occurred in less than 0.1% of time. They could be resolved by the approach in less then 20 minutes.

Statistical static capacity management in virtualized data centers supporting fine grained QoS specification

From an ecological but also from an economical and in the meantime a technical view the fast ongoing increase of power consumption in todays data centers is no longer feasible. Methodologies, more efficiently using energy in data centers, must be developed. One step into this direction is to increase the utilization of the hardware in data centers by using virtualization techniques. The efficiency of such techniques strongly depends on provisioning and allocating the resources. Statistical static allocation approaches have been proven to use resources very efficiently by overbooking hardware using the fact that typical applications rarely need their maximum demand and especially seldom all at the same time. In our work we analyze these approaches and point out two major drawbacks. First, we show that guaranteeing QoS (Quality of Service) aspects by two parameters, as it is done in these approaches, is inflexible and often leads to suboptimal solutions. Second, such conventional approaches require statistical independent resource demands of the virtual machines which prevent them from being used in most common data centers. To overcome these drawbacks, we first suggest a more fine grained way of specifying QoS guarantees that saved up to 20% of resources to be reserved for a single virtual machine in our examples. Furthermore, we present a new allocation approach that is able to deal with any kind of correlations in the resource demand. Compared to a pessimistic approach, that reserves the maximum required resources for each virtual machines all over the time, our approach can save 27% of required hardware resources in a typical data center scenario.

Voltage- and ABB-island optimization in high level synthesis

Using our framework supporting simultaneous behavioral to RTL synthesis, component-wise floorplanning, as well as ABB (adaptive body biasing) and VDD aware power and delay prediction, we present a performance neutral methodology for optimal VDD-island generation and multiple ABB application. We show that tuning supply and body voltage for the entire design reduces the total energy dissipation by 4.6-38.1% without any performance loss. By allowing more than one body voltage and without optimizing the floorplan, the savings do not rise any further. Carefully floorplanning the design, we can additionally use VDD-islands reducing the power by 8.7-49.2%. In addition to the power savings, the power and delay variability due to PTV (process, temperature, voltage) variation can be reduced with all proposed ABB approaches, assuming that only the chip structure has to be fixed at design time, but the voltage levels can be adapted after the system manufacturing.

Power and cost aware distributed load management

The continuously rising energy demand of data centers has already reached the two-digit megawatt area by now. The rising energy costs force operators to search for effective methods for energy reduction. A popular, software based instrument is consolidation using virtualization, since this provides also high flexibility for changing business requirements. Dynamic load management can introduce an even stronger consolidation here. An enterprise maintaining more than just one data center can also apply a distributed data center comprehensive load management. This paper presents a vision minimizing the energy requirement or energy costs, using geographical specific characteristics of servers and data centers. The potential for savings of the introduced distributed load management can be up to 40%.

Modelling the impact of high level leakage optimization techniques on the delay of RT-components

To adress the problem of static power consumption, approaches as ABB and AVS have been proposed to reduce runtime leakage in integrated circuits. Applying these techniques is a trade off between power and delay, which is best decided early in the design flow. Therefore high level power and delay estimation is needed. In our work, we present a fast RT Level delay macro model considering supply and bias voltages and temperature. Errors below 5% combined with only few characterization data enables this approach to be used by high level design tools to support leakage optimization by e.g. ABB and AVS.

Accurate PTV, state, and ABB aware RTL blackbox modeling of subthreshold, gate, and PN-Junction leakage

We present a blackbox approach to model leakage currents of RTL data-path components. The model inputs are temperature, VDD, body voltage of NMOS and PMOS and the bitvector at the input. Additionally, the model accepts a statistical Gaussian variation introduced by intra-die and systematic variation introduced by inter-die. Both variations can be given independently for each BSIM-level process parameter; in this work we evaluate variation of channel length, gate-oxide thickness and channel doping. Model output is the sum of subthreshold, gate, and pn-junction leakage. The evaluation of an RT component can be done in milliseconds and the result for the 45nm and 65nm BPTM technology is within 2% against single BSIM4.40 evaluation and within 5% against statistical BSIM4.40 evaluation assuming 1% variation of the process parameters.

Adaptives Powermanagement für Desktop- und Notebooksysteme

ZUSAMMENFASSUNG Die Herausforderung des Powermanagements von Desktop- und Notebooksystemen liegt in der Vorhersage des Nutzungsverhaltens einzelner Bestandteile oder des gesamten Systems in naher Zukunft. Neben dem Blick in die Zukunft ist bei vielen zu steuernden Geräten ebenfalls die Ermittlung des Nutzungszustands schwierig, da sich dieser, wie beispielsweise im Fall des Displays, nicht direkt aus den für das System messbaren Daten ermitteln lässt. Verschiedene vorhersagende sowohl statische als auch dynamische Verfahren, haben sich dieser Herausforderung gestellt. Untersuchungen im Rahmen dieser Veröffentlichung zeigen jedoch, dass die statischen Verfahren im Kontext von Desktop- und Notebooksystemen eher ungeeignet sind, da sie das stark vom Nutzer aber auch dem jeweiligen Anwendungsfall abhängige Nutzungsverhalten zu sehr verallgemeinern. Der Einsatz der meisten bekannten dynamischen Verfahren in reellen Systemen scheitert häufig an zu hoher Speicher- oder Laufzeitkomplexität. Das in dieser Veröffentlichung vorgestellte Verfahren kombiniert dynamische vorhersagende mit klassischen timeout-basierten Verfahren. Die statistische Repräsentation und Auswertung der aufgenommenen Daten reduziert hierbei stark den Speicher- und Rechenzeitbedarf. Fehlinterpretationen bei der Ermittlung des Nutzungszustands der zu steuernden Geräte werden durch eine Fehlerkorrektur adaptiert, so dass diese nach einer Anlernphase nicht mehr zu weiteren Fehlentscheidungen führen. Das inzwischen zum Patent angemeldete Verfahren wurde in ein kommerzielles Produkt integriert, mit dem Messungen in einem reellen Szenario durchgeführt wurden. Hierbei ergab sich im Vergleich zu statischen timeout-basierten Powermanagementverfahren eine signifikant bessere Ausnutzung der zur Abschaltung einzelner Geräte oder des gesamten Systems nutzbaren Zeiträume bei gleicher oder geringerer Fehlerhäufigkeit. Am Beispiel einer fünfstündigen Zugfahrt wurde gezeigt, dass eine Verlängerung der Laufzeit von 38min bei eingestreuten Pausen von insgesamt einer Stunde möglich ist. Der geringe Speicher- und Rechenzeitbedarf des Verfahrens ermöglicht dessen problemlosen Einsatz in heute gängigen Betriebssystemen zur Steuerung des Powermanagements von Desktop- und Notebooksystemen.