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Dive into the research topics where Martin L. Villafana is active.

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Featured researches published by Martin L. Villafana.


vlsi test symposium | 2013

Experiments and analysis to characterize logic state retention limitations in 28nm process node

Sachin Dileep Dasnurkar; Animesh Datta; Mohamed Hassan Abu-Rahma; Hieu Nguyen; Martin L. Villafana; Hadi Rasouli; Sean Tamjidi; Ming Cai; Samit Sengupta; P. R. Chidambaram; Raghavan Thirumala; Nikhil Kulkarni; Prasanna Seeram; Prasad Rajeevalochanam Bhadri; Prayag B. Patel; Sei Seung Yoon; Esin Terzioglu

Mobile devices spend most of the time in standby mode. Supported features and functionalities are increasing in each newer model. With the wide spread adaptation of multitasking in mobile devices, retaining current status and data for all active tasks is critical for user satisfaction. Extending battery life in portable mobile devices necessitates the use of minimum possible energy in standby mode while retaining present states for all active tasks. This paper for the first time, explains the low voltage data-retention failure mechanism in flops. It analyzes the impact of design and process parameters on the data retention failure. Statistical nature of data retention failure is established and validated with extensive Monte-Carlo simulations across various process corners. Finally, silicon measurement from several 28nm industrial mobile chips is presented showing good correlation of retention failure prediction from simulation.


international integrated reliability workshop | 2000

Reliability of via and its diagnosis by e-beam probing

William Xia; Martin L. Villafana; Jonathan Tappan; Tim Watson; Michael Campbell

A stress-related intermittent via failure was investigated in an unstable digital circuit of a mixed signal device by novel use of an e-beam probing technique. The failed via structure was traced and identified by an e-beam prober connected to an ATE tester. FIB, SEM, and TEM analysis of the failed via structure showed voids and an anomalous thin layer under the Ti/TiN adhesion layer at the interface of tungsten plug and AlCu alloy.


Archive | 2010

TECHNIQUES PROVIDING FIDUCIAL MARKERS FOR FAILURE ANALYSIS

Michael Laisne; Xiangdong Pan; Foua Vang; Prayag B. Patel; Donald D. Lyons; Martin L. Villafana


Archive | 2012

ASSEMBLY FOR OPTICAL BACKSIDE FAILURE ANALYSIS OF PACKAGE-ON-PACKAGE (POP) DURING ELECTRICAL TESTING

Himaja H. Bhatt; Martin E. Parley; Martin L. Villafana


Archive | 2012

CIRCUIT AND METHOD FOR TESTING INSULATING MATERIAL

Angelo Pinto; Martin L. Villafana; You-Wen Yau; Homyar C. Mogul; Lavakumar Ranganathan; Rohan V. Gupte; Weijia Qi; Kent J. Pingrey; Carlos P. Aguilar; Paul J. Giotta; Leon Y. Leung; Jina M. Antosz; Bhupen M. Shah; Choh-Fei Yeap; Michael Campbell; Lawrence A. Elugbadebo; Allen A.B. Hogan


Archive | 2014

MINIMUM VOLTAGE AND MAXIMUM PERFORMANCE MAPPING USING LASER-ASSISTED TECHNIQUES

Lavakumar Ranganathan; Martin L. Villafana; Lesly Zaren Venturina Endrinal


Archive | 2013

Apparatus for temperature controlled electrical and optical probe fault characterization of integrated circuits

Armand Anthony Graupera; Himaja H. Bhatt; Joanna Kiljan; Lesly Zaren Venturina Endrinal; Martin L. Villafana; Ulrike Kindereit


Archive | 2010

Techniques Employing Light-Emitting Circuits

Martin L. Villafana; Michael DiBattista; Gary Woods


Archive | 2010

Light emitting circuit with light emitting transistor

Michael DiBattista; Martin L. Villafana; Gary Woods


Archive | 2010

Techniques providing fiducial markers for failure analysis in a semiconductor die

Michael Laisne; Xiangdong Pan; Foua Vang; Prayag B. Patel; Donald D. Lyons; Martin L. Villafana

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