Masaki Atsuta

Ultra-high di/dt 2500 V MOS assisted gate-triggered thyristors (MAGTs) for high repetition excimer laser system

A novel MOS assisted gate-triggered thyristor (MAGT) having high di/dt turn-on characteristics is proposed. It is shown that 40 kA/cm/sup 2// mu s of di/dt can be attained for a turn-on from 1500-V anode voltage, 9090-A/cm/sup 2/ peak anode current, and 0.7- mu s pulse width, with an extremely low turn-on power loss. The transient anode voltage, caused by high di/dt, is less than 100 V, even in the case of 9090 A/cm/sup 2/ for the anode current density. It is concluded that MAGT is a very promising device to replace thyratrons in a high-repetition excimer laser system.<<ETX>>

High-frequency 6000 V double-gate GTO's

A double-gate gate turn off (GTO) thyristor, which has an additional gate on the n-base layer, has been proposed to realize high-frequency operation for high-power inverters. The double-gate structure has further been combined with an n-buffer structure to realize narrow n-base width. A forward-blocking voltage of 6000 V was obtained, even at 150 degrees C, when the second gate was shorted to the anode electrode. In order to reduce turn-on and turn-off switching losses, the dependence of these losses on a time interval between two gate triggering pulses has been investigated. It was found that the turn-off loss of approximately 1/20th of that for a conventional GTO thyristor was achieved by adjusting the time interval between the two gate triggering pulses. >

Study of Si-wafer directly bonded interface effect on power device characteristics

A high voltage transistor and an Insulated Gate Bipolar Transistor (IGBT) were fabricated by using Silicon-wafer Direct Bonding (SDB) technique to study the effect of direct bonded interface on power device characteristics. Prior to the device fabrication, heat treatment condition of SDB was investigated, and it was confirmed that electrically and mechanically stable SDB interface was obtaind at more than 1000°C. The transistor showed sufficiently high hFE(=10) for this high voltage transistor. The fall-time and on-state voltage of IGBT were controlled by adjusting bonded interface position. All of these results encourage new SDB technique applications for power device improvements.

Design criteria for high frequency, ultra high di/dt MAGTs

2500-V MOS assisted gate triggered thyristors (MAGTs) have been proposed as promising devices for future pulsed power applications. It was successfully demonstrated that the device has extremely high turn-on capability, comparable to thyratrons. The MAGT high-frequency operation design criteria are shown here. The photoluminescence (PL) decay method was used to measure the actual carrier lifetime in MAGT devices. It reveals that an electron carrier lifetime more than half of the operating pulse width is sufficient to minimize the turn-on loss. This means that the pause period can be reduced while still retaining small turn-on loss. A simple model is presented to interpret the turn-on loss dependence on the N-base width. With the optimized devices, 5-kHz operation was successfully demonstrated.<<ETX>>

A SOI-based CMOS-MEMS IR image sensor with partially released reference pixels

We have developed a 22 µm pitch and 320 × 240 pixel uncooled IR (infrared) image sensor. For IR detection, we utilized single crystal silicon series p–n junctions, which were fabricated on a SOI (silicon on insulator) wafer utilizing 8 inch CMOS technology and MEMS processes. The p–n junctions were passivated with buried and laminated oxide layers from wet crystalline etching of the silicon substrate. The oxide layers were also utilized to absorb the IR radiation and to form supporting beams. The partially released pixels were utilized as thermal black pixels (TBs) instead of optical black pixels (OBs) for correlated double sampling. The IR image sensor utilizing TBs obtained a thermal image of the human body stably without the smearing phenomenon.

Temperature stability improvement of a QVGA uncooled infrared radiation FPA

We have developed a low-cost uncooled infrared radiation focal plane array (FPA) requiring no thermoelectric cooler (TEC), which has 320 x 240 detection pixels with 22 um pitch. The silicon single-crystal series p-n junction diodes and the low-noise readout circuit on the same SOI wafer fabricated by 0.13 um CMOS technology were utilized for infrared (IR) detection. The temperature dependence in the readout circuit was eliminated by correlated double sampling (CDS) operation with reference pixel that was insensitive to infrared radiation. In order to reduce the temperature dependence, we improved the reference pixel and the readout circuit. Although the reference pixels should be completely insensitive to IR radiation, prior reference pixels showed measurable sensitivity. The improved reference pixel was formed by partially releasing with bulk-micromachining and was verified to be insensitive to IR radiation by an object of 400°C. The readout circuit had a differential amplifier instead of a singletransistor amplifier and an analog-to-digital converter (ADC). In each portion, CDS was applied to reduce temperature dependence. The first CDS operation was used for eliminating the pixel output variation and the second operation was used for canceling the variation of the differential amplifier. The output variation referred to input was reduced to 1/30 compared with that of the prior circuit. Moreover, the residual variation of output voltage was reduced by CDS operation in ADC and stable output data was obtained with ambient temperature variation. With these improvements, the sensitivity variation of the FPA was improved to 10% in the range of -30 degrees to 80 degrees and noise equivalent temperature difference (NETD) of 40 mK was achieved.

Scale down of p-n junction diodes of an uncooled IR-FPA for improvement of the sensitivity and thermal time response by 0.13-µm CMOS technology

We have developed an uncooled infrared radiation focal plane array (IR-FPA) with 22 μm pitch and 320 × 240 pixels utilizing silicon p-n junction diodes, which were fabricated by 0.13 μm CMOS technology and bulk-micromachining. The thermal time response of cells was lowered to be 16msec by reduction of thermal capacity of cells. In addition to increase the sensitivity of cells by extending the length of supporting beams, p-n junction diode was scaled down as small as 20% in area compared to previous one. Micro-holes were formed in the cell to reduce only thermal capacity, which were negligibly small compared to incident IR wavelength. This method needs no additional process step and is considered as suitable for low cost and mass-productive IR-FPA.

An NPN Transistor Fabricated by Silicon Wafer Direct-Bonding

Silicon Wafer Direct-Bonding (SDB) is a new technique which makes it possible to bond a pair of silicon wafers without any other material. A variety of SDB technique applications are foreseen for power devices or sensors. A bonded interface between heavily doped wafers shows good ohnic characteristics[1]. The 1800V Bipolar-Mode M0SFET (IGBT) is the first application, taking advantage of these ohmic characteristics for the bonded interfacelzl, The SDB technique could possibly be used to realize new devices which could not be realized by ordinary process techniques, if it can be successfully applied in the active regions inside the device. For example, impurity profiles in the base regions for a transistor or a Gate turn-off thyristor (GTO) can be inproved. This paper first reports the resistance of the bonded interface in the p-type substrate being measured. Second, NPN transistors, which have a bonded interface inside the p-base, were fabricated and evaluated in respect to current amplification factors. The bonded interface influence on minority carrier transport was investigated by comparing the measured results with nunerically simulated results.

Transient voltage induced leakage current in power diode with SIPOS resistive field plate

Leakage current of current diode was found to flow at a much lower voltage than that of avalanche breakdown under the conditions of high voltage rise rate (dV/dt) and low frequency, and this leakage current was characteristic of semi-insulating polycrystalline silicon (SIPOS) resistive field plate (RFP). This current has not been reported previously, and we call it transient voltage induced leakage current (TVIC). TVIC can be suppressed by optimizing the reduced surface field (RESURF) structure. The electric charge for TVIC increased as both the applied voltage and the pulse time interval increased whereas it decreased as the temperature increased. A possible model explaining TVIC mechanism was presented.

High frequency 6000 V gate GTOs with buried gate structure

A new double gate GTO with buried gate structure for a second gate has been proposed to realize high turn-off gain simultaneously with low turn-off switching loss. The double gate GTO has been combined with an n-buffer structure to realize 6000 V forward blocking voltage with a narrow n-base width, such as 550 p . The high turn-off gain, such as 6, was obtained when the anode current was 500 A . It was found that the double gate GTOs with buried gate realize a very short tail time and a small tail current. The newly developed double gate GTOs decrease the turn-off loss to less than 1/10 of that for the conventional single gate GTOs.