Masaki Fujigaya

A 28 nm High-k/MG Heterogeneous Multi-Core Mobile Application Processor With 2 GHz Cores and Low-Power 1 GHz Cores

This paper presents power management and low power techniques of our heterogeneous quad/octa-core mobile application processor (AP). This AP has a combination of high-performance 2 GHz cores and energy-efficient 1 GHz cores. The maximum performance in the octa-core configuration is 35,600 DMIPS. The key design highlights are as follows. 1) Using a dedicated PLL and H-tree clock in the high-performance CPU achieves both 2 GHz operation and reduced dynamic power. 2) A low-leakage SRAM in a 28 nm HPM process is used and the leakage current of the peripheral circuits of the SRAM macro is optimized via multiple threshold voltages (Vt) and gate lengths (Lg), resulting in 24% leakage reduction of L1 cache. 3) The effects of process and voltage variations are accurately corrected by an on-chip process sensor and direct sensing of the voltage in the power mesh of the chip. 20% dynamic power reduction, 29% leakage power reduction and 40 mV improvement of minimum operation voltage are achieved. 4) An enhanced CPU clock control mechanism is employed, which uses an on-chip delay sensor to reduce AC voltage drop. 5) The heterogeneous CPU architecture maintains high performance even during thermal throttling.

A 28nm High-κ metal-gate single-chip communications processor with 1.5GHz dual-core application processor and LTE/HSPA+-capable baseband processor

The increase in the use and number of smartphone devices is causing heavy data traffic volumes on existing 3G mobile wireless networks. LTE, often referred to as 4G, offers true mobile broadband. It is a new network and access technology that provides new spectrum resources, much increased spectral efficiency, higher throughputs (150Mb/s with higher rates to come), at lower latency and it uses an IP-based infrastructure. LTE is the solution to mitigate the traffic load issue and it is being rolled out around the world. The proposed communication processor R-Mobile U2 (RMU2) achieves single-chip integration of a 1.5GHz dual-core application processor and a triple mode (GSM/WCDMA/LTE) base-band processor. Key design highlights of the RMU2 are: 1) A 28nm HKMG high-performance and low-leakage (HPL) CMOS bulk process achieves an optimal balance between both low leakage current and high performance. 2) A CPU clock control mechanism, called the “power saver”, limits the CPU power so as not to exceed a threshold level and to reduce IR drop. 3) The internal power domain is separated into 33 sub-blocks with I/O NMOS power switches [1] to minimize leakage current of any unused sub-block. 4) A dual-mode low-leakage SRAM [2] achieves low standby current in addition to conventional memory characteristics.

10.2 A 28nm HPM heterogeneous multi-core mobile application processor with 2GHz cores and low-power 1GHz cores

The worldwide demand for high-performance mobile or car infotainment application processors (AP) is increasing. This demand coexists with the need for low power to achieve long battery life and avoid thermal runaway. A heterogeneous CPU configuration is an effective solution. The proposed heterogeneous quad/octa-core AP has a combination of high-performance 2GHz cores and energy-efficient 1GHz cores. The maximum performance in the octa-core configuration is 35600 DMIPS. The key design highlights are: 1) Using a dedicated PLL and H-tree clock in the high-performance CPU achieves both 2GHz operation and reduced dynamic power. 2) A low-leakage SRAM in a 28nm HPM process is used and the leakage current of the peripheral circuits of the SRAM macro is optimized via multiple threshold voltages (Vt) and gate lengths (Lg). 3) The effects of process and voltage variations are accurately corrected by an on-chip process sensor and direct sensing of the voltage in the power mesh of the chip. 4) An enhanced CPU clock control mechanism is employed, which uses an on-chip delay sensor to reduce AC IR drop. 5) The heterogeneous CPU architecture maintains high performance even during thermal throttling.

Power-Management Features of R-Mobile U2, an Integrated Application Processor and Baseband Processor

R-mobile U2 integrates an application processor and an LTE-capable triple-band baseband processor in 28-nm technology to provide rich content to the mid-range market. Several power-management techniques are equipped, including a low-leakage power switch, dual-standby mode static RAM (SRAM), and frequency control for maximum power suppression.