Masako Ogata

A SOI-based CMOS-MEMS IR image sensor with partially released reference pixels

We have developed a 22 µm pitch and 320 × 240 pixel uncooled IR (infrared) image sensor. For IR detection, we utilized single crystal silicon series p–n junctions, which were fabricated on a SOI (silicon on insulator) wafer utilizing 8 inch CMOS technology and MEMS processes. The p–n junctions were passivated with buried and laminated oxide layers from wet crystalline etching of the silicon substrate. The oxide layers were also utilized to absorb the IR radiation and to form supporting beams. The partially released pixels were utilized as thermal black pixels (TBs) instead of optical black pixels (OBs) for correlated double sampling. The IR image sensor utilizing TBs obtained a thermal image of the human body stably without the smearing phenomenon.

Scale down of p-n junction diodes of an uncooled IR-FPA for improvement of the sensitivity and thermal time response by 0.13-µm CMOS technology

We have developed an uncooled infrared radiation focal plane array (IR-FPA) with 22 μm pitch and 320 × 240 pixels utilizing silicon p-n junction diodes, which were fabricated by 0.13 μm CMOS technology and bulk-micromachining. The thermal time response of cells was lowered to be 16msec by reduction of thermal capacity of cells. In addition to increase the sensitivity of cells by extending the length of supporting beams, p-n junction diode was scaled down as small as 20% in area compared to previous one. Micro-holes were formed in the cell to reduce only thermal capacity, which were negligibly small compared to incident IR wavelength. This method needs no additional process step and is considered as suitable for low cost and mass-productive IR-FPA.

A 320 x 240pixel uncooled TEC-less infrared radiation focal plane array with the reset noise canceling algorithm

We have developed a 22um pitch and 320 × 240 pixel uncooled infrared radiation focal plane array on the silicon-oninsulator (SOI) substrate by means of 0.35um CMOS technology and bulk-micromachining. For IR detection, we use silicon single-crystal series p-n junctions that can realize high uniformity of sensitivity and low voltage drift. The supporting beam shrinkage enabled the pixel pitch shrinkage from 32um to 22um and 320 × 240 pixel number without deteriorating NETD. We also developed a SOI low-noise CMOS readout circuit that can calibrate chip temperature and introduced a noise canceling digital algorithm to cancel the reset noise generated in the readout circuit. The dominant noise source, SOI MOSFET noise, was decreased by optimizing the gate design. Finally the FPA has realized noise equivalent temperature difference (NETD) of 0.12K and requires no thermo-electric cooler (TEC) and is mounted on a low-cost standard ceramic package.