Masanori Hayashikoshi

A high-density and high-speed 1T-4MTJ MRAM with Voltage Offset Self-Reference Sensing Scheme

A high-density and high-speed memory cell named 1-transistor 4-magnetic tunnel junction (1T-4MTJ) has been proposed for magnetic random access memory (MRAM). The new 1T-4MTJ cell has been successfully demonstrated by a 1 Mb MRAM test device, using a 130 nm CMOS process. The sensing scheme of a self-reference sense amplifier with Voltage offset (SRSV) enables high-speed memory operation (access time) of tAC=56 nsec and 50 MHz@4cycle.

Normally-off MCU architecture for low-power sensor node

Sensor nodes are used extensively in order to gather real-time information in the social environment and natural environment. And the production volume of sensor nodes is much increased with the development of cyber-physical systems. Therefore, it becomes important how to reduce the power consumption of huge sensor nodes. In this work, normally-off architecture of microcontroller for future low-power sensor node is proposed. To realize true low-power effects with normally-off computing technology, a co-design of hardware and software technology is much important. In this work, the power consumption of sensor nodes is possible to reduce of around 70% by using normally-off MCU architecture in sensor node.

Energy-Efficient Continuous Task Scheduling for Near Real-Time Periodic Tasks

Improving energy efficiency is critical for embedded systems in our rapidly evolving information society. It has been considered that heterogeneous multiprocessors can contribute to improving the energy efficiency of embedded systams. In such processors, executing tasks on lower performance core at lower frequency is better for energy efficiency though higher performance is required for huge tasks to meet their deadlines. To minimize the energy consumption while meeting deadlines strictly, adaptive task scheduling is very important. A drawback of the existing scheduling algorithms is, they assume that the deadline is the same as the input interval. Near real-time data processing, such as multimedia streaming applications, has deadline that is longer than the input interval thanks to buffering. For such applications, the conventional frame-based scheduling cannot realize optimal scheduling due to their shortsighted deadline assumption. To realize globally optimal executions of these applictions, we propose a slackbased continuous task scheduling algorithm, which takes advantage of the long deadline. This algorithm determines an active core and the timing of core swithching based on slack time. We use two types core with different performance and realize continuous execution. We confirmed our approach can take advantage of the longer deadline and reduce the average power consumption by up to 27%.

Low-power multi-sensor system with normally-off sensing technology for IoT applications

We propose the low-power multi-sensor system with normally-off sensing technology for IoT applications, which achieves almost zero standby power at the no-operation modes. A hierarchical power management scheme with activity localization can be reduced the number of transitions between power-on and power-off modes with re-scheduling and bundling task procedures. We also propose autonomously standby mode transition control by selecting optimum standby mode of microcontrollers, reducing total power consumption in the multisensor network. The prototyping evaluation boards with sensors are developed and demonstrated, observing 91% power reductions by adopting the proposed power gating and autonomously standby mode transition control.

Data-aware power management for periodic real-time systems with non-volatile memory

In real-time systems, power gating is widely adopted by processing cores but not working memory because of data loss. Meanwhile, new non-volatile memory technology, which is comparable to volatile memory, quickly emerges. Thus, in this paper, we propose data-aware power management for real-time systems with both volatile and non-volatile memories. Considering the trade-off between data migration energy overhead and energy reduction through power gating, we minimize energy consumption when the system is idle by appropriately selecting sleep modes and making decisions on data migration. Experimental results show that this approach can reduce energy consumption by up to 20%.

A 1Mb High-Density Toggle-MRAM with Symmetrical Read/Write Operations

A high-density MRAM cell structure, 1T-4MTJ cell is successfully applied to a Toggle-mode MRAM, with reduced effective cell array size and symmetrical Read/Write operations. A lMb-lT-4MTJ Toggle MRAM with 66 MHz operation (tAC = 43.4 nsec) is demonstrated.

Non-volatile Memories

This chapter describes the basic properties of various computer memories. Historical evolution of the roles of non-volatile functionalities in computer architecture is discussed to explain recent rejuvenating interest in new non-volatile memory technologies. Next, required properties for memories, such as scalability, access speed, power consumption, are discussed referring to those of current main-stream memories, i.e., dynamic random access memory (DRAM), static RAM, and NAND flash memory. Then, histories, working principles, and properties of spin-transfer torque magnetoresistive RAM, resistive RAM, phase change RAM, ferroelectric RAM, and NOR flash memory are described. Finally, possible positioning of these various non-volatile memories in future computer architecture are discussed.

Technologies for Realizing Normally-Off Computing

Normally-off computing relies on device technologies, architectural and activity management technologies. To realize normally-off computing systems, details of each technology should be studied. Device technologies provide component that has as small BET as possible by minimizing energy overhead. Architectural technologies combined several devices that have different characteristics and realize flexible components that can adapt to a wide variety of applications. Activity management is done by software such as task scheduling. Based on these knowledges, normally-off computing system is realized.

Research and Development of Normally-Off Computing—NEDO Project

Based on normally-off computing design methodology, we developed three practical systems that introduced normally-off computing. These systems are healthcare, mobile information device and sensor node for social infrastructure. These systems are selected from different types of application areas. Through implementing a variety of systems, universalness of normally-off computing is confirmed. Also we introduce our “Normally-Off Computing Project”, which supports these practical developments.

Low-power multi-sensor system with task scheduling and autonomous standby mode transition control for IoT applications.

The low-power multi-sensor system with task scheduling and autonomous standby mode transition control for IoT applications are proposed, which achieves almost zero standby power at the no-operation modes. A power management scheme with activity localization can reduce the number of transitions between power-on and power-off modes with re-scheduling and bundling task procedures. And autonomously standby mode transition control selects the optimum standby mode of microcontrollers, reducing total power consumption. We demonstrate with evaluation board as a use case of IoT applications, observing 91% power reductions by adopting task scheduling and autonomously standby mode transition control combination.