Masanori Tsutsumi

MULTI-CHARGE REGION MEMORY CELLS FOR A VERTICAL NAND DEVICE

Bottom recess process for an outer blocking dielectric layer inside a memory opening

Method of making a three dimensional NAND device

UNIFORM THICKNESS BLOCKING DIELECTRIC PORTIONS IN A THREE-DIMENSIONAL MEMORY STRUCTURE

Method of suppressing epitaxial growth in support openings and three-dimensional memory device containing non-epitaxial support pillars in the support openings

BATCH CONTACTS FOR MULTIPLE ELECTRICALLY CONDUCTIVE LAYERS

THREE-DIMENSIONAL MEMORY DEVICE CONTAINING ANNULAR ETCH-STOP SPACER AND METHOD OF MAKING THEREOF

Three-dimensional memory device with different thickness insulating layers and method of making thereof

THREE-DIMENSIONAL MEMORY DEVICE CONTAINING VERTICALLY ISOLATED CHARGE STORAGE REGIONS AND METHOD OF MAKING THEREOF

Three-dimensional memory device with discrete self-aligned charge storage elements and method of making thereof