Masashi Kurosawa

Orientation-controlled Si thin films on insulating substrates by Al-induced crystallization combined with interfacial-oxide layer modulation

Orientation-controlled Si films on transparent insulating substrates are strongly desired to achieve high-efficiency thin-film solar cells. We have developed the interfacial-oxide layer modulated Al-induced low temperature (<450 °C) crystallization technique, which enables dominantly (001) or (111)-oriented Si films with large grains (20–100 μm). These results are qualitatively explained on the basis of a model considering the phase transition of the interfacial Al oxide layers. This process provides the orientation-controlled Si templates on insulating substrates, which enables successive high quality epitaxial growth necessary for advanced Si thin-film solar cells.

Highly (111)-oriented Ge thin films on insulators formed by Al-induced crystallization

(111)-oriented Ge thin films on insulators are essential for advanced electronics and photovoltaic applications. We investigate Al-induced crystallization of amorphous-Ge films (50-nm thickness) on insulators focusing on the annealing temperature and the diffusion controlling process between Ge and Al. The (111)-orientation fraction of the grown Ge layer reaches as high as 99% by combining the low-temperature annealing (325 °C) and the native-oxidized Al (AlOx) diffusion-control layer. Moreover, the transmission electron microscopy reveals the absence of defects on the Ge surface. This (111)-oriented Ge on insulators promises to be the high-quality epitaxial template for various functional materials to achieve next-generation devices.

Nucleation-controlled gold-induced-crystallization for selective formation of Ge(100) and (111) on insulator at low-temperature (∼250 °C)

Selective formation of Ge(100) and (111) on amorphous-insulator at low-temperatures (∼250 °C) is realized through gold-induced-crystallization using a-Ge/Au/SiO2 stacked-structures by combining interface-energy-modulation of substrates. Introduction of thin-Al2O3 layers (∼7 nm thickness) at a-Ge/Au interfaces enables large-grain (≥20 μm) Ge(111) formation, which is speculated to be due to suppression of random bulk-nucleation and domination of (111)-oriented interface-nucleation on SiO2. To examine this speculation, Al2O3-covered substrates are employed. This results in formation of Ge(100), due to energetically favorable (100)-oriented interface-nucleation on Al2O3. Consequently, large-grain (≥20 μm) Ge(100) and (111) are achieved on amorphous-insulators at 250 °C. This technique is very useful to realize flexible-electronics.

Growth and applications of GeSn-related group-IV semiconductor materials

Abstract We review the technology of Ge1−xSnx-related group-IV semiconductor materials for developing Si-based nanoelectronics. Ge1−xSnx-related materials provide novel engineering of the crystal growth, strain structure, and energy band alignment for realising various applications not only in electronics, but also in optoelectronics. We introduce our recent achievements in the crystal growth of Ge1−xSnx-related material thin films and the studies of the electronic properties of thin films, metals/Ge1−xSnx, and insulators/Ge1−xSnx interfaces. We also review recent studies related to the crystal growth, energy band engineering, and device applications of Ge1−xSnx-related materials, as well as the reported performances of electronic devices using Ge1−xSnx related materials.

Interfacial-Oxide Layer Controlled Al-Induced Crystallization of Si1-xGex (x: 0–1) on Insulating Substrate

The effects of interfacial oxide layers on the Al-induced crystallization (AIC) of amorphous Si1-xGex (x: 0–1) films on an insulator at a low temperature (<500 °C) have been investigated. In the case of Si, the inversion of the Si/Al layers was achieved for samples with and without interfacial oxide layers between the Si and Al layers. In addition, it was found that the existence of interfacial oxide layers was required to obtain large grain (~100 µm) polycrystalline Si with a (111) orientation. However, in the case of SiGe, the interfacial oxide layers significantly retarded AIC growth. Consequently, layer exchange occurred inhomogenously, which resulted in inhomogenous crystallization even after a long annealing time (410 °C, 100 h). To solve this problem, the effects of interfacial oxide thickness on AIC growth were investigated. As a result, complete layer exchange was achieved for samples with the whole Ge fractions (x: 0–1) by controlling the air exposure time. A qualitative model is presented.

Comprehensive study of Al-induced layer-exchange growth for orientation-controlled Si crystals on SiO2 substrates

Orientation-controlled crystalline Si films on insulating substrates are strongly required to achieve high-performance thin-film devices for next-generation electronics. We have comprehensively investigated the layer-exchange kinetics of Al-induced crystallization (AIC) in stacked structures, i.e., amorphous-Si/Al-oxide/Al/SiO2-substrates, as a function of the air-exposure time of Al surfaces (tair: 0–24 h) to form Al-oxide interface-layers, the thickness of Al and Si layers (dAl, dSi: 50–200 nm), the annealing temperature (450–500 °C), and the annealing time (0–50 h). It has been clarified that longer tair (>60 min) and/or thinner dAl and dSi ( 100 nm) lead to the (100) oriented growth. No correlation between the annealing temperature and the crystal orientation is observed. Detailed analysis reveals that the layer-exchange kinetics are dominated by “supply-limited” processing, i.e., diffusion of Si...

High hole mobility tin-doped polycrystalline germanium layers formed on insulating substrates by low-temperature solid-phase crystallization

We investigated the effects of incorporation of 0%–2% tin (Sn) into amorphous germanium (Ge) on its crystallization behavior and electrical properties. Incorporation of only 0.2% Sn caused the polycrystallization temperature of Ge to lower from 450 to 430 °C, while a polycrystalline Ge1−xSnx layer with high crystallinity compared to that of polycrystalline Ge was formed by incorporation of 2% Sn. A polycrystalline Ge1−xSnx layer with a low Sn content of 2% annealed at 450 °C exhibited a Hall hole mobility as high as 130 cm2/V s at room temperature even though it possessed a small grain size of 20–30 nm. The Hall hole mobility of a poly-Ge1−xSnx layer with an Sn content of 2% was four times higher than that of a polycrystalline Ge layer and comparable to that of single-crystalline silicon.

Single-crystalline laterally graded GeSn on insulator structures by segregation controlled rapid-melting growth

Single-crystalline laterally graded GeSn-on-insulator (GeSnOI) structures are essential to achieve novel device-arrays with various direct-energy-band gaps, which can be merged with high-density Si large-scale-integrated-circuits. We investigate the seeding rapid-melting-growth of narrow stripes with a-Ge/Sn/a-Ge stacked-structures. This achieves laterally graded GeSn crystalline layers on Si substrates covered with SiO2 films. Stripe-length dependent GeSn lateral-profiles are quantitatively explained by Scheil equation, which enables precise designing of GeSn lateral-profiles. High-crystallinity GeSn stripes without dislocations or stacking faults are also demonstrated.

Large grain growth of Ge-rich Ge1-xSnx (x 0.02) on insulating surfaces using pulsed laser annealing in flowing water

We investigate Sn incorporation effects on the growth characteristics of Ge-rich Ge1−xSnx (x < 0.02) on SiO2 crystallized by pulsed laser annealing (PLA) in air and water. Despite the very low Sn content of 2%, Sn atoms within the GeSn layers play a role in preventing ablation and aggregation of the layers during these PLA. Raman and electron backscatter diffraction measurements demonstrate achievement of large-grain (∼800 nmϕ) growth of Ge0.98Sn0.02 polycrystals by using PLA in water. These polycrystals also show a tensile-strain of ∼0.68%. This result opens up the possibility for developing GeSn-based devices fabricated on flexible substrates as well as Si platforms.

Hybrid-orientation Ge-on-insulator structures on (100) Si platform by Si micro-seed formation combined with rapid-melting growth

Hybrid-integration of (111), (110), and (100) Ge-on-insulator (GOI) on an Si chip is essential to merge III-V semiconductor optical-devices as well as high-speed Ge transistors onto Si-large-scale integrated-circuits. We clarify important-parameters to control Ni-metal-induced lateral crystallization and Al-induced layer-exchange crystallization. This achieves artificial (110) and (111) Si micro-seed on insulating-film. Together with Si substrate as (100) Si seed, multi-crystal-seeds with different orientations are aligned on a Si chip. Then, SiGe-mixing triggered rapid-melting-growth of amorphous-Ge is examined from these multi-crystal-seeds. This enables simultaneous Ge lateral-crystallization with (111), (110), and (100) orientations. High-quality, hybrid-orientation GOIs without defects are demonstrated on Si platform.