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Featured researches published by Masashi Ueno.


Infrared Technology and Applications XXV | 1999

Low-cost 320x240 uncooled IRFPA using a conventional silicon IC process

Tomohiro Ishikawa; Masashi Ueno; Kazuyo Endo; Yoshiyuki Nakaki; Hisatoshi Hata; Takanori Sone; Masafumi Kimata; Tatsuo Ozeki

A 320 X 240 uncooled IR focal plane array (IRFPA) with series PN junction diodes fabricated on a silicon-on- insulator (SOI) wafer has been developed. Resistive bolometers, pyroelectric detectors and thermopile detectors have been reported for large scale uncooled IRFPAs, while the detector developed uses the temperature dependence of forward-biased voltage of the diode. The diode has low 1/f noise because it is fabricated on the monocrystalline SOI film which has few defects. The diode is supported by buried silicon dioxide film of the SOI wafer, which becomes a part of a thermal isolated structure by using bulk silicon micromachining technique. The detector contains an absorbing membrane with a high fill factor of 90 percent to achieve high IR absorption, and the readout circuit of the FPA contains a gate modulation integrator to suppress the noise. Low cost IRFPA can be supplied because the whole structure of the FPA is fabricated on commercial SOI wafers using a conventional silicon IC process.


Proceedings of SPIE | 2012

Two-million-pixel SOI diode uncooled IRFPA with 15μm pixel pitch

Daisuke Fujisawa; Tomohiro Maegawa; Yasuaki Ohta; Yasuhiro Kosasayama; Takahiro Ohnakado; Hisatoshi Hata; Masashi Ueno; Hiroshi Ohji; Ryota Sato; Haruyoshi Katayama; Tadashi Imai; Munetaka Ueno

We report the development of a 2-million-pixel, that is, a 2000 x 1000 array format, SOI diode uncooled IRFPA with 15 μm pixel pitch. The combination of the shrinkable 2-in-1 SOI diode pixel technology, which we proposed last year [1], and the uncooled IRFPA stitching technology has successfully achieved a 2-million-pixel array format. The chip size is 40.30 mm x 24.75 mm. Ten-series diodes are arranged in a 15 μm pixel. In spite of the increase to 2-million-pixels, a frame rate of 30 Hz, which is the same frame rate as our former generation (25 μm pixel pitch) VGA IRFPA, can be supported by the adoption of readout circuits with four outputs. NETDs are designed to be 60 mK (f/1.0, 15 Hz) and 84 mK (f/1.0, 30 Hz), respectively and a τth is designed to be 12 msec. We performed the fabrication of the 2-million-pixel SOI diode uncooled IRFPAs with 15 μm pixel pitch, and confirmed favorable diode pixel characteristics and IRFPA operation where the evaluated NETD and τth were 65 mK (f/1.0, 15 Hz) and 12 msec, respectively.


Proceedings of SPIE, the International Society for Optical Engineering | 2005

640 x 480 pixel uncooled infrared FPA with SOI diode detectors

Masashi Ueno; Yasuhiro Kosasayama; Takaki Sugino; Yoshiyuki Nakaki; Yoshio Fujii; Hiromoto Inoue; Keisuke Kama; Toshiki Seto; Munehisa Takeda; Masafumi Kimata

This paper describes the structure and performance of a 25-micron pitch 640 x 480 pixel uncooled infrared focal plane array (IR FPA) with silicon-on-insulator (SOI) diode detectors. The uncooled IR FPA is a thermal type FPA that has a temperature sensor of single crystal PN junction diodes formed in an SOI layer. In the conventional pixel structure, the temperature sensor and two support legs for thermal isolation are made in the lower level of the pixel, and an IR absorbing structure is made in the upper pixel level to cover almost the entire pixel area. The IR absorption utilizes IR reflections from the lower level. Since the reflection from the support leg portions is not perfect due to the slits in the metal reflector, the reflection becomes smaller as the support leg section increases in reduced pixel pitches. In order to achieve high thermal isolation and high IR absorption simultaneously, we have developed a new pixel structure that has an independent IR reflector between the lower and upper levels. The structure assures perfect IR reflection and thus improves IR absorption. The FPA shows a noise equivalent temperature difference (NETD) of 40 mK (f/1.0) and a responsivity non-uniformity of less than 0.9%. The good uniformity is due to the high uniformity of the electrical characteristics of SOI diodes made of single crystal silicon (Si). We have confirmed that the SOI diodes architecture is suitable for large format uncooled IR FPAs.


Proceedings of SPIE, the International Society for Optical Engineering | 2000

Performance of 320 x 240 uncooled IRFPA with SOI diode detectors

Tomohiro Ishikawa; Masashi Ueno; Yoshiyuki Nakaki; Kazuyo Endo; Yasuaki Ohta; Junji Nakanishi; Yasuhiro Kosasayama; Hirofumi Yagi; Takanori Sone; Masafumi Kimata

We reported a 320 x 240 uncooled IRFPA with 40 micrometers pitch having diode detectors fabricated on an SOI wafer. Since the fabrication process of the SOI diode detector is compatible with the silicon IC process, only a silicon IC fab is necessary for manufacture of the FPAs. This enables mass production of low cost uncooled FPAs. This paper focuses on the performance of the FPA. In the previous paper, we proposed a novel infrared absorbing structure which offers a very high fill factor. Although this structure exhibited a high infrared absorption because of interference absorbing components incorporated in the structure, large thermal capacitance was an issue. Thus we have improved the infrared absorbing structure in the newly developed FPA. The improved absorbing structure has been devised making use of reflection of metal interconnections including diode metal straps. A thermal time constant of 17 msec has been achieved without degrading the responsivity compared with the conventional absorbing structure.


SPIE's 1995 International Symposium on Optical Science, Engineering, and Instrumentation | 1995

Monolithic uncooled infrared image sensor with 160 by 120 pixels

Masashi Ueno; Osamu Kaneda; Tomohiro Ishikawa; Kouichi Yamada; Akira Yamada; Masafumi Kimata; Masahiro Nunoshita

This paper presents the key design features of an uncooled infrared image sensor with 160 by 120 pixels. This sensor has a monolithic structure using micromachining technology. These features concern the configuration of the readout circuit, the structure of the infrared detector, and the thermal isolation structure in a pixel. The first feature is a simple readout circuit that includes neither an amplifier nor a switching transistor in the pixel. The second feature is the use of a thin film resistive bolometer made of polysilicon as the infrared detector. The detector has a P+-P--N+ diode structure which operates as a bolometer and cuts off current passes through non-selected pixels. The forward resistance of the diode can be tailored by adjusting the shape and impurity concentration of the P- region. Finally, a microbridge structure for the thermal isolation is made in each pixel by using the micromachining technology. The bolometer is monolithically integrated on this structure. Since polysilicon is generally used in the conventional Si-LSI process, this choice of detector material makes it possible to manufacture the image sensor using only current Si-LSI facilities, and realize a low cost uncooled infrared camera.


SPIE's 1995 International Symposium on Optical Science, Engineering, and Instrumentation | 1995

PtSi Schottky-barrier infrared focal plane array for ASTER/SWIR

Masashi Ueno; Tadashi Shiraishi; Makoto Kawai; Yoshikazu Yoneda; Masafumi Kimata; Masahiro Nunoshita

A PtSi Schottky-barrier infrared focal plane array (FPA) has been developed for the short wavelength infrared radiometer (SWIR) of the advanced spaceborne thermal emission and reflection radiometer (ASTER). Six linear image sensors, which correspond to six observation bands, are integrated on the FPA to simplify the cooling system and the optics. Each linear sensor has a stagger layout of 2100 PtSi Schottky-barrier detectors and has an effective fill factor of 100%. The detector size is 20 micrometers by 17 micrometers with a cross-track pitch of 16.5 micrometers and a spacing between adjacent sensors of 1.33 mm. The charge transfer in each linear sensor is carried out by two 4-phase buried-channel CCD shift registers. The driving clock and structure of the CCD are optimized to achieve a large charge handling capacity and low transfer inefficiency. To assure a high reliability and a focal plane flatness, we have developed an original multilayer ceramic package with a filter holding structure. A focal plane flatness less than 14 micrometers and a heat shock endurance over 4000 cycles are achieved by using this packaging technology. The wavelength region between 1.5 micrometers and 2.5 micrometers is separated into six bands by optical band-pass filters attached to the package.


Proceedings of SPIE, the International Society for Optical Engineering | 2006

SOI diode uncooled infrared focal plane arrays

Masafumi Kimata; Masashi Ueno; Munehisa Takeda; Toshiki Seto

An uncooled infrared focal plane array (IR FPA) is a MEMS device that integrates an array of tiny thermal infrared detector pixels. An SOI diode uncooled IR FPA is a type that uses freestanding single-crystal diodes as temperature sensors and has various advantages over the other MEMS-based uncooled IR FPAs. Since the first demonstration of an SOI diode uncooled IR FPA in 1999, the pixel structure has been improved by developing sophisticated MEMS processes. The most advanced pixel has a three-level structure that has an independent metal reflector for interference infrared absorption between the temperature sensor (bottom level) and the infrared-absorbing thin metal film (top level). This structure makes it possible to design pixels with lower thermal conductance by allocating more area for thermal isolation without reducing infrared absorption. The new MEMS process for the three-level structure includes a XeF2 dry bulk silicon etching process and a double organic sacrificial layer surface micromachining process. Employing advanced MEMS technology, we have developed a 640 x 480-element SOI diode uncooled IR FPA with 25-μm square pixels. The noise equivalent temperature difference of the FPA is 40 mK with f/1.0 optics. This result clearly demonstrates the great potential of the SOI diode uncooled IR FPA for high-end applications. In this paper, we explain the advances and state-of-the-art technology of the SOI diode uncooled IR FPA.


Infrared Technology and Applications XXX | 2004

Pixel scaling for SOI-diode uncooled infrared focal plane arrays

Yasuhiro Kosasayama; Takaki Sugino; Yoshiyuki Nakaki; Yoshio Fujii; Hiromoto Inoue; Hirofumi Yagi; Hisatoshi Hata; Masashi Ueno; Munehisa Takeda; Masafumi Kimata

Pixel scaling for SOI diode uncooled infrared focal plane arrays (IRFPAs) was investigated in order to achieve the realization of small size and low cost IRFPAs. Since the SOI diode pixel has two different layers -- one for the temperature sensor and the thermal isolation structure, and the other for the infrared absorption structure -- each layer can be independently designed. Hence, a high fill factor can be maintained when reducing pixel size without changing the basic structure of the pixel, which is advantageous in reducing the pixel size. In order to verify this, the authors have developed an SOI diode IRFPA with the pixel size of 28 μm x 28 μm which is 49% of the previous pixel size (40 μm x 40 μm) and achieved a noise equivalent temperature difference (NETD) of 87 mK. In order to further reduce the pixel size and to improve device sensitivity, we propose a new pixel structure. In this structure, a reflector is fabricated between the infrared absorption structure and support legs. Therefore, the infrared rays which are incident on the support legs, which do not sufficiently function as a reflector, can be used effectively. A new pixel structure with a pixel size of 25 μm x 25 μm was fabricated and realized the thermal conductance of 1.0 x 10-8 W/K and the infrared absorption structure was then verified for its effectiveness.


AIP Advances | 2013

Effect of graphene on plasmonic metasurfaces at infrared wavelengths

Shinpei Ogawa; Daisuke Fujisawa; Masashi Ueno

Significant enhancement of infrared transmittance by the presence of a graphene layer on a plasmonic metasurface (PLM) has been demonstrated. PLMs with different configurations were fabricated, and their transmittance with and without graphene was compared. Selective enhancement by graphene occurred at the plasmon resonance wavelength. The degree of enhancement was found to depend on the width of the gap between the periodic metal regions in the PLM. A maximum enhancement of ∼210% was achieved at a wavelength of 10 μm. The ability to achieve such a drastic increase in transmittance at the plasmon resonant wavelength is expected to lead to improvements in the performance of energy collecting devices and optical sensors.


Proceedings of SPIE | 2009

Novel readout circuit architecture realizing TEC-less operation for SOI diode uncooled IRFPA

Takahiro Ohnakado; Masashi Ueno; Yasuaki Ohta; Yasuhiro Kosasayama; Hisatoshi Hata; Takaki Sugino; Takanori Ohno; Keisuke Kama; Masahiro Tsugai; Hiroshi Fukumoto

We have developed a novel readout circuit architecture realizing a TEC-less (Thermo-Electric Cooler) operation for an SOI diode uncooled infrared focal plane array (IRFPA). Through the fabrication of an SOI diode uncooled 320 x 240 IRFPA adopting the readout circuit architecture with our existing 25μm pixel-pitch technology, we demonstrate that the variation of the output DC level of the pixels is successfully suppressed in environmental temperatures from -10°C to 50°C. The developed TEC-less technology greatly enhances the ability of the SOI diode uncooled IRFPA, which inherently possesses excellent uniformity and low noise features.

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