Masayoshi Ichikawa
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Featured researches published by Masayoshi Ichikawa.
international parallel and distributed processing symposium | 2004
Kazuyuki Maruo; Masayoshi Ichikawa; Naoto Miyamoto; Leo Karnan; Takahiro Yamaguchi; Koji Kotani; Tadahiro Ohmi
Summary form only given. We introduce a new image recognition processor using a run-time reconfiguration (RTR) technology. A phase impulse response function (PIRF) is employed as an application for evaluating the performance of RTR architecture. By utilizing the RTR architecture effectively, a complicated image processing application such as PIRF can be implemented on a single processor. To achieve this, a dynamically-reconfigurable arithmetic logic unit (DRALU) is proposed. Simulation results show that our proposed processor using DRALU can execute the PIRF within 30 msec.
IEICE Transactions on Electronics | 1999
Kazuyuki Maruo; Tadashi Shibata; Takahiro Yamaguchi; Masayoshi Ichikawa; Tadahiro Ohmi
Archive | 2002
Masayoshi Ichikawa; Takahiro Yamaguchi; Minako Yoshida; Mani Soma
Archive | 2002
Minako Yoshida; Takahiro Yamaguchi; Masayoshi Ichikawa; Mani Soma
Archive | 1999
Kiyoshi Fujiwara; Masayoshi Ichikawa
Archive | 1999
Masayoshi Ichikawa
Archive | 2015
Kazuyuki Maruo; Takahiro Yamaguchi; Masayoshi Ichikawa
Archive | 2006
Masayoshi Ichikawa; Takahiro Yamaguchi
Archive | 2005
Masayoshi Ichikawa; Aritomo Kikuchi
Archive | 2002
Minako Yoshida; Takahiro Yamaguchi; Masayoshi Ichikawa; Mani Soma
