Masayuki Kawabata

A New Method for Measuring Aperture Jitter in ADC Output and Its Application to ENOB Testing

This paper proposes a new method for measuring aperture jitter on an ADC output. It measures both the average ENOB loss and the worst-case ENOB loss due to aperture jitter. Because it adds only a negligible computation time to an existing ENOB test, it can also be used in an HV production environment without significantly increasing the overall test time.

Real-time testing method for 16 Gbps 4-PAM signal interface

This paper proposes a method for testing a device with multi-level signal interfaces. This method utilizes multi-level drivers that generate multi-level signals and multi-level comparators that are based on a new concept. The multi-level drivers can test the voltage noise tolerance of a receiver device with multi-level signal interfaces. The multi-level comparators realize real-time functional testing of a multi-level signal with the same number of comparators as a conventional test system, by changing the threshold voltage levels dynamically in response to the expected values of a signal under test. This dynamic threshold comparator concept is suitable for a system testing a high-speed multi-level signal. This method is also scalable for an increase in the number of voltage levels such as 8-PAM and 16-PAM signals. In addition, with the proposed method, the testing of a signal having emphasis/ de-emphasis can be realized, and improved testing of the digital modulation signal such as by QAM can be expected. Experimental results are discussed with a prototype circuit that demonstrates the proposed concept applied to a 16 Gbps 4-PAM Test System. Applications of the proposed method are also discussed.

HTS Sampler with Improved Circuit Design and Layout

This paper reviews our progress on the high-T c superconducting (HTS) sampler development, covering from the circuit design to the latest experimental data in the sinusoidal and pulse waveform measurements. A computer simulation has revealed that our sampler circuit with an improved design enables waveform measurement with the bandwidth over 100 GHz even with the thermal noise at around 40 K. Using the HTS sampler circuits fabricated employing an improved layout, we demonstrated waveform measurements for sinusoidal signals with frequencies of up to 50 GHz, the upper limit of the signal generator we used, both in the voltage-input-type system with a high-frequency input line and in the current-input-type one with a superconducting pickup coil. In the pulse measurement using an on-chip sampler, we succeeded in observing pico-second-order-wide single flux quantum (SFQ) current pulses, suggesting the potential bandwidth of our HTS sampler of more than 125 GHz.

A new method for measuring alias-free aperture jitter in an ADC output

This paper proposes a new method for directly measuring alias-free aperture jitter in an ADC output. Both the average ENOB and the worst-case ENOB due to aperture jitter are also measured after the elimination of the aliasing noise. Because it adds only a negligible computation time to an existing ENOB test of a single frequency, it can also be used in an HV production environment and should reduce the overall test time by at least three times.

Low-distortion signal generation for analog/mixed-signal circuit testing with digital ATE

This paper proposes low-distortion sinusoidal/two-tone signal generation techniques for analog/mixed-signal IC testing with a digital Automatic Test Equipment (ATE) using only single digital output pin. They provide a rectangular waveform approximated to a single-tone or two-tone with specified harmonics suppression; we can specify multiple harmonics to suppress using digital control, and it is followed by an analog LPF for smoothing. The proposed method is simple for implementation with modest performance, compared to a wide dynamic range delta-sigma DAC. Its configuration, principle, simulation as well as experimental results at the laboratory level are presented. Also its application, combined with a high-speed DAC for analog circuit testing is described.

Sine signal generation with specified multiple harmonics suppression

This paper proposes a sinusoidal signal generator algorithm and architecture for mixed-signal IC testing input as well as quadrature detection circuit applications. It can provide a rectangular waveform approximated to a single-tone signal with harmonics suppression; we can specify the harmonics to suppress using digital control. Its circuit consists of digital circuit, a 1-bit DA converter with an analog filter. Proposed method is simple for implementation with modest performance, compared to a wide dynamic range delta-sigma digital-to-analog converter (DAC) and other methods.

Rectangular Waveform Generation with Harmonics Suppression

This paper proposes signal generator (BIST/BOST) algorithms and architectures for mixed-signal IC testing input. They can provide rectangular waveforms approximated to single-tone and/or two-tone signals with harmonics/IMD suppression. Their circuit consists of digital circuit, a 1-bit DA converter with an analog filter. Proposed method is simple for implementation with modest performance, compared to a wide dynamic range delta-sigma DAC [1, 2] and other methods [3-5].

Real-Time Testing Method for Multilevel Signal Interfaces and Its Impact on Test Cost

This paper proposes a real-time testing method for multilevel signal interfaces. It utilizes multilevel drivers that can modulate both the voltage and timing of an output signal, and multilevel comparators based on a dynamic threshold concept. The authors also consider the impact on test cost of the proposed system and compares that cost with a conventional binary test system.