Yasuhide Kuramochi
Tokyo Institute of Technology
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Publication
Featured researches published by Yasuhide Kuramochi.
asian solid state circuits conference | 2007
Kota Tanaka; Yasuhide Kuramochi; Takashi Kurashina; Kenichi Okada; Akira Matsuzawa
This paper proposes a direct capacitance-to-digital converter (CDC) for biotelemetry applications. The proposed circuit is based on a charge redistribution technique using a capacitive sensor and a ranging capacitor array. The circuit does not require accurate reference voltages, so it is robust for fluctuation of supply voltage. Output-code range can be dynamically zoomed in arbitrary capacitance range of sensor output by using the ranging capacitor array. An 8-bit converter with an active area of 0.026 mm2, consuming 0.9 nJ per sample, is demonstrated. The proposed circuit maintains its performance even in the condition of 28% fluctuations in supply voltage. Measurement results of the readout circuit are also demonstrated, which shows that the proposed circuit can work well in the presence of large parasitic capacitances.
asian solid state circuits conference | 2007
Yasuhide Kuramochi; Akira Matsuzawa; Masayuki Kawabata
We present a 10-bit 1-MS/s successive approximation analog-to-digital converter core including a charge redistribution digital-to-analog converter and a comparator. A new linearity calibration technique enables use of a nearly minimum capacitor limited by kT/C noise. The ADC core without digital blocks has been fabricated in a 0.18-mum CMOS process and consumes 110muW at 1.8 V power supply. With the calibration it achieves 9.0-dB improvement of SNDR and 23.3dB improvement of SFDR. The measured SNDR and SFDR are 51.1 dB and 69.8 dB respectively.
The Japan Society of Applied Physics | 2009
T. M. Vo; Yasuhide Kuramochi; Masaya Miyahara; Takashi Kurashina; Akira Matsuzawa
1. Abstract This paper presents an ultra-low power 10-bit capacitance to digital converter. Full dynamic circuits realize zero-static power and ultra-low FoM of 290 fJ/conv. steps. It, for example, consumes only 3 nA at sampling frequency of 30 Hz. A differential architecture keeps the linearity error small up to the Nyquist frequency of sensor capacitance variation. Furthermore, internal clock signals are generated in self timed manner suitable for micro controller systems. The prototype was fabricated in 0.18 μm CMOS process and measured data fit with the real sensor characteristic precisely. These features are suitable for in-vivo medical systems or sensor-telemetry micro systems because of the ultra-low power and zero-static current operation with the high precision measure of pressure in asynchronous micro controller systems.
Archive | 2007
Yasuhide Kuramochi; Akira Matsuzawa
Archive | 2007
Yasuhide Kuramochi; Akira Matsuzawa
Archive | 2008
Yasuhide Kuramochi; Akira Matsuzawa
Archive | 2010
Yasuhide Kuramochi; Akira Matsuzawa
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences | 2009
Yasuhide Kuramochi; Akira Matsuzawa; Masayuki Kawabata
Archive | 2008
Yasuhide Kuramochi; Akira Matsuzawa; 泰秀 倉持; 昭 松澤
Archive | 2006
Yasuhide Kuramochi; Akira Matsuzawa