Matsuaki Terada

Speech packet switching method and device

In a speech packet switching system, an input speech signal to a speech packet transmitting station is converted to a digital signal to form speech data blocks, which are discriminated to talkspurt blocks and silence blocks, and only the talkspurt speech blocks are packetized and transmitted through a speech packet switching network. In a receiving station, a series of speech packets received in one talkspurt period are temporarily stored in a variance absorbing buffer to compensate for a variance of transmission delay times resulting from the transmission through said speech packet switching network to add variance absorbing times to the speech packets depending on the transmission delay times of the respective speech packets. Then the speech packets are sequentially reproduced. A size of the variance absorbing buffer is determined by a variance of the transmission delay times of the speech packets received in one talkspurt period and the size of the variance absorbing buffer for the next talkspurt period is dynamically changed based on the determined size. A constant speech quality is assured to a change of the variance of the transmission delay times of the speech packets due to a change of traffic in the speech packet switching network.

Large-scale and high-speed interconnection of multiple FDDIs using ATM-based backbone LAN

The authors discuss problems related to the bridging method between the asynchronous transfer mode (ATM)-based high-speed multimedia backbone local area network (MBLAN) and a fiber distributed data interface (FDDI), especially the filtering database (FDB) construction method for filtering of frames. The problems are achieving high performance, correspondence to a large-scale system, and prevention of broadcast. The FDB construction method was evaluated based on these problems. Through the evaluation, it was noted that the FDB learning failure rate must be below 10/sup -3/ and a frame filtering process when relaying frames from the MBLAN to an FDDI is not necessary. An FDB access method is proposed. By using a multiple hashing algorithm for the FDB access, the proposed method makes it possible to deal with all terminal addresses, even in a large-scale network system that includes tens of thousands of terminals or more, and also enables high-speed filtering/forwarding of frames between terminals. Both the entry search speed and an effective number of entries in the entry table can be adapted to the requirements of an application by changing the maximum number of hashing times.<<ETX>>

A high speed protocol processor to execute OSI

A high-speed open systems interconnection (OSI) protocol processor is described which is intended for use in LAN adapters. The processor uses recently developed hardware for normal data transfer on layer 2 (LLC class 1), layer 3 (CLNP) and layer 4 (TP4). Connection control and abnormal data transfer (i.e. error handling) of OSI are executed by a general purpose microprocessor. In an experimental system, this processor increased OSI processing speed seven to 12 times over conventional systems. The new processor can therefore significantly improve LAN adapter performance by reducing the overhead associated with OSI processing time.<<ETX>>

An FDDI bridge for the high-speed multimedia backbone LAN

An architecture for a high-performance bridge that interconnects the fiber distributed data interface (FDDI) ring and the asynchronous transfer mode (ATM) technology based high-speed multimedia backbone LAN (MBLAN) is proposed. This bridge architecture enables the FDDI bridge to learn the source terminal address efficiently by selecting the error-free cell in which the source terminal address is contained, instead of receiving the whole FDDI frame. The fast filtering-database access technique, which applies a multiple hashing algorithm, has high flexibility: that is, both the entry search speed and an effective number of entries in the entry table can be adapted to the requirements of an application by changing the maximum number of hashing times. Both the proposed architecture and the fast filtering-database access technique can be applied to any bridges, the media access method of which handles a fixed-length packet. The MBLAN provides data transmission, as well as voice and video transmission, and is under development.<<ETX>>

A high speed protocol processor to boost gateway performance

The authors propose a high-speed protocol processor for gateways based on the following concept: normal data transfer is executed by special-purpose hardware and a general-purpose microprocessor handles abnormal data transfer and connection control. To analyze the quantitative effect of this proposal, a high-speed protocol processor which can execute OSI (open systems interconnection) layers two to four was manufactured, and its performance was measured. The protocol processing time for normal data transfer in the experimental system is 1/12 that of the conventional system on the transmission side and 1/7 that of the conventional system on the reception side. This result shows that application of the high-speed protocol processor in protocol-converting gateways is effective for improving performance.<<ETX>>

Performance evaluation of synchronous distributed wireless network emulator for high-speed mobility

The IEEE 1588 Precision Time Protocol Version 2 (PTP v2) standard was developed to establish precise synchronization protocols for distributed nodes, and thus facilitate the development of distributed time-based systems. As an example of an applied system, we developed a distributed wireless network emulator that permits precise and stable synchronized time-based wireless link scheduling. In our system, each agent node simply emulates schedule-based wireless links without exchanging control messages with any other nodes. This emulator is designed to test IP-based protocols for high scalability and high-speed mobility while maintaining high accuracy levels over extended periods of time. In our previous work, we showed the existence of a relationship between packet handling size and accuracy in a developed emulator system. In this study, we evaluate the performance of agent node loads, and their relationship to processing time accuracy, by obtaining time information from PTP v2. These factors are important when deciding future extension policy. From our experimental results, we determined that performance has two kind of influence. Specifically, processing time increases as loading increases, and some processing elements become excessively long under high load conditions. These factors have a significant influence on time-based distributed systems, such as our distributed mobile network emulator, which is designed to handle processes at microsecond speeds.