Michael G. Farrier

Very Large Area CMOS Active-Pixel Sensor for Digital Radiography

To address the growing demand for low-noise large-area digital-radiography sensors, a unique CMOS active-pixel sensor (APS) technology has been developed. Large-tiled CMOS radiographic panels can compete in performance with passive-pixel arrays, amorphous-silicon thin-film-transistor panels, and phosphor-panel technologies. Although CMOS sensors have become a key technology in low-cost consumer camera products, CMOS APS technology is also suited for manufacture of large-format imagers used to construct radiographic-detector panels. Large-area CMOS radiographic sensors combine a large full well over 3.5 million e- with low read noise less than 300 e- to provide wide dynamic range and improved signal-to-noise ratio under demanding radiographic imaging conditions. With precision-assembly techniques, tiling gaps are minimized to be less than 0.3 pixels to produce fully correctable flat-field images. Applications include nondestructive testing, scientific imaging, security screening, and medical radiography.

26.2-million-pixel CCD image sensor

A 26.2 million pixel CCD Imager Sensor has been successfully designed and fabricated. The device uses a full frame architecture with 5,120 X 5,120 pixels organization. With a pitch of 12 microns in both dimensions, the overall image zone is 61.44 mm X 61.44 mm. The charge storage capacity of each photosite is greater than 130,000 electrons and the minimum detectable charge is 50 electrons when correlated double sampling is used. The device is also capable of reduced dark current operation of 60 pA/cm2 when operated in the surface inversion mode. The device has four outputs, each of which can operate up to 12 MHz.

Amorphous selenium direct detection CMOS digital x-ray imager with 25 micron pixel pitch

We have developed a high resolution amorphous selenium (a-Se) direct detection imager using a large-area compatible back-end fabrication process on top of a CMOS active pixel sensor having 25 micron pixel pitch. Integration of a-Se with CMOS technology requires overcoming CMOS/a-Se interfacial strain, which initiates nucleation of crystalline selenium and results in high detector dark currents. A CMOS-compatible polyimide buffer layer was used to planarize the backplane and provide a low stress and thermally stable surface for a-Se. The buffer layer inhibits crystallization and provides detector stability that is not only a performance factor but also critical for favorable long term cost-benefit considerations in the application of CMOS digital x-ray imagers in medical practice. The detector structure is comprised of a polyimide (PI) buffer layer, the a-Se layer, and a gold (Au) top electrode. The PI layer is applied by spin-coating and is patterned using dry etching to open the backplane bond pads for wire bonding. Thermal evaporation is used to deposit the a-Se and Au layers, and the detector is operated in hole collection mode (i.e. a positive bias on the Au top electrode). High resolution a-Se diagnostic systems typically use 70 to 100 μm pixel pitch and have a pre-sampling modulation transfer function (MTF) that is significantly limited by the pixel aperture. Our results confirm that, for a densely integrated 25 μm pixel pitch CMOS array, the MTF approaches the fundamental material limit, i.e. where the MTF begins to be limited by the a-Se material properties and not the pixel aperture. Preliminary images demonstrating high spatial resolution have been obtained from a frst prototype imager.

Megapixel image sensors with forward motion compensation for aerial reconnaissance applications

Focal planes constructed of high speed, high resolution CCD image sensors are suitable for airborne reconnaissance applications, but have mainly consisted of linear and TDI array configurations. Until recently large format area arrays have been limited to staring applications, characterized by long integration times and slow readout rates. Large area reconnaissance focal planes require opto-mechanical systems for motion compensation across the imaging plane. A unique CCD architecture has been developed to provide electronic image motion compensation using variable speed vertical clocking segments. This architecture has been applied to very large full frame CCD sensors having 2048 X 2048 and 5040 X 5040 pixel formats.

50-megapixel CCD image sensor with motion compensation

This paper presents the development status of a 50-million pixel, large-format, electro-optical framing charge-coupled device (CCD) with on-chip graded forward motion compensation. The development addresses the requirements set forth by the US Naval Research Lab for Ultra-high Resolution reconnaissance. A 5,040 by 10,080 element CCD has been developed and demonstrated to meet the 100-Mpixel/s UHR requirement.

High-frame-rate, motion-compensated 25.4 megapixel image sensor

The applicability of large-area full-frame CCD image sensor technology to large optical format aerial reconnaissance applications has been recently demonstrated. The requirements of low-contrast, high-resolution imaging at high frame rates have generated the need for a manufacturable, multitap, small-pitch, wafer-scale CCD image sensor technology. The added requirement of incorporation of electronic motion compensation at the focal plane has generated the need for multisegmented full-frame area array architectures. Characterization results from the newly developed 5040 X 5040 element, eight-tap, full-frame image sensor with multisegmentation for electronic motion compensation are discussed. Experimental determination of resistive-capacitive time constants for metal strapped vertical clock busses on wafer-scale sensors is discussed.

Characterization and modeling of CCD devices on high-resistivity silicon substrates

CCD devices fabricated on low-resistivity silicon epi (30 - 60 (Omega) -cm) exhibit satisfactory imaging characteristics in the visible spectrum but inferior imaging characteristics in the near infrared and x ray regions. This is a result of the greater penetration depth of the photons, which tend to travel beyond the depletion regions under the CCD gates causing optical crosstalk and poor responsivity. This represents a performance limiting issue for acousto-optical applications and scientific imaging. CCD devices fabricated on high-resistivity silicon epi (>= 1000 (Omega) -cm) with increased epi layer thickness will exhibit superior imaging performance for near-infrared and x-ray photons. This is because the width of the depletion regions is much greater compared to devices on conventional substrates. DALSA has fabricated CCD structures on high-resistivity substrates and has examined their performance, in particular imaging behavior in the near-infrared region of the spectrum. We also examine the behavior of the nonimaging circuitry associated with the CCD such as the output amplifiers.