Michele Vaiana

A 56-mW 23-mm/sup 2/ single-chip 180-nm CMOS GPS receiver with 27.2-mW 4.1-mm/sup 2/ radio

A 56-mW 23-mm/sup 2/ GPS receiver with CPU-DSP-64 kRAM-256 kROM and a 27.2-mW 4.1-mm/sup 2/ radio has been integrated in a 180-nm CMOS process. The SoC GPS receiver, connected to an active antenna, provides latitude, longitude, height with 3-m rms precision with no need of external host processor in a [-40, 105]/spl deg/C temperature range. The radio draws 17 mA from a 1.6-1.8-V voltage supply, takes 11 pins of a VFQFPN68 package, and needs just a few passives for input match and a crystal for the reference oscillator. Measured radio performances are NF=4.8 dB, Gp=92 dB, image rejection > 30 dB, -112 dBc/Hz phase noise @ 1 MHz offset from carrier. Though GPS radio linearity and ruggedness have been made compatible with the co-existence of a microprocessor, radio silicon area and power consumption is comparable to state-of-the-art stand-alone GPS radio. The one reported here is the first ever single-chip GPS receiver requiring no external host to achieve satellite tracking and position fix with a total die area of 23 mm/sup 2/ and 56-mW power consumption.

Balanced SiGe PA Module for Multi-Band and Multi-Mode Cellular-Phone Applications

In this paper, the integration of a MM (GSM/EDGE/WCDMA) MB (850/900MHz, 1800/1900/2100MHz) 50 Omega-matched isolator-less flip-chip PAs, capable of envelope and power tracking operation, is discussed. The PAs are integrated in a 0.25 mum SiGe technology and are soldered on a 4-layer substrate. The system is hosted in a 6 x 8 mm2 plastic module.

A wideband fully integrated 0.25/spl mu/m BiCMOS 5GHz medium power amplifier

A wideband 4.2GHz-5.6GHz balanced Medium Power Amplifier has been designed in a 0.2Spm SiGe:C bipolar process. The two stage amplifier is housed in a VFQF’F”20 package with integrated inputloutput matcbing networks and onboard printed rat-race balnns. A saturated output power of 16dBm has been measured with a small signal gain of IS.2dB at SGHz with a total current consumption of llOmA from a 2.4V supply voltage at ambient temperature. The measured 3dB bandwidth is IIGHz, the best value ever reported in literature for a fully integrated medium PA housed in a standard padage for mass production witb DO external components required for inputloutput matching. The die size is 1.4~1.750 m d .

Area-optimized sub-fF offset trimming circuit for capacitive MEMS interfaces

This paper presents a trimming correction technique to calibrate the offset in capacitive readout circuits of MEMS sensors. The technique relies on a N-bit digital voltage divider which allows to implement an equivalent variable capacitor with sub-femto Farad step variations. To reduce area occupation, a hybrid approach entailing both resistive and capacitor voltage dividers is introduced. Design equations showing the tradeoff between linearity and area occupation versus relative mismatch of capacitors and resistors are derived. Design examples are reported showing a reduction of area occupation greater than 60% while preserving linearity performance.

23mm/sup 2/ single-chip 0.18/spl mu/m CMOS GPS receiver with 28mW-4.1 mm/sup 2/ radio and CPU/DSP/RAM/ROM

A 23 mm/sup 2/ 0.18 /spl mu/m CMOS GPS receiver with ARM7-DSP-64 k RAM-256 k ROM and a 28 mW-4.1 mm/sup 2/ radio has been integrated. The SoC GPS receiver, connected to an active antenna, provides latitude, longitude, height with 3 m rms precision with no need of external host processor in [-20,80]/spl deg/C temperature range. The radio draws 17.5 mA from a 1.6 V-1.8 V supply, takes 11 pins of a VFQFPN68 package and needs just a few passives for input matching and one crystal. Measured radio performances are: NF=4.8 dB, Gp=92 dB, image rejection >30 dB, -112 dBc/Hz @ 1 MHz offset phase noise. Though linearity and ruggedness of the GPS radio have been made compatible with the co-existence of microprocessor, its silicon area and power consumption is aligned with state-of-the-art stand-alone CMOS GPS radio. The one reported here is the first ever radio successfully embedded into a single-chip GPS receiver requiring no external host to achieve satellite tracking and position fix with a total die area of 23 mm/sup 2/.