Yasuyuki Yoshinaga

Excess-current-free stacked Josephson junctions with high IcRn product

Abstract We have successfully demonstrated the elimination of excess currents in interface-treated Josephson junctions (ITJs) having vertically stacked trilayer structure based on c -axis oriented YBa 2 Cu 3 O 7− δ (YBCO) films. Several experimental results obtained so far suggest that the excess currents are transported via superconducting short paths formed in the tunnel barrier. Considering that short paths are made of YBCO, we intend to patch the paths into insulators by doping PrGaO 3 , after the amorphous layer on the surface of the base YBCO electrode was formed by etching process. The other fabrication sequences are the same as the previous ones. The obtained ITJs showed excellent resistively shunted-junction type current–voltage ( I – V ) characteristics and almost 100% of modulation depth of the critical current for an external magnetic field at 4.2 K. Even for smaller value of J c , the vertically stacked type ITJs showed almost the same I c R n value as that obtained for ramp-edge type IMJs with higher J c . Furthermore, the yield is remarkably improved by using this technique.

Planarization of the YBa2Cu3O7-x Base Electrodes in Trilayer Josephson Junctions

We have applied the chemical-mechanical polishing (CMP) planarization technique to YBa2Cu3O7-x (YBCO) films for the base electrodes in trilayer Josephson junctions. In our planarization process, YBCO films were directly polished using a diamond-based slurry and cleaned by low-angle ion etching. The planarized films showed extremely flat surfaces with the average roughness (Ra) less than 0.5 nm. Moreover, the c-axis-oriented YBCO/PrBa2Cu3O7-y (PBCO)/YBCO trilayer junctions fabricated using the planarized films as the base electrodes showed resistively shunted junction-like characteristics even when the PBCO barriers were as thin as 10 nm. The IcRn products of the junctions were more than 1 mV at 4.2 K. Our results indicate that CMP is an effective method for obtaining flat YBCO films and for improving the properties of trilayer Josephson junctions.

Investigation of the electrical properties of vertically stacked interface-treated Josephson junctions

In order to understand the barrier structure of vertically stacked-type interface-treated Josephson junctions, we compared the electrical properties of the stacked junctions with those of ramp-edge junctions. With increasing critical current density (Jc), IcRn products for both types of junction increased and the spread of critical current decreased. Nevertheless, the stacked junctions had higher IcRn products and lower spreads than those of ramp-edge junctions with Jc of the same order. Moreover, we investigated the temperature dependence of the critical current and the conductance for junctions with Jc values of around 103 A cm−2. No significant difference was found for the dependence of Ic. In contrast, the conductance of stacked junctions somewhat increased with increasing temperature, which resulted in the reduction of IcRn. The reduction is small at 4.2–30 K; we thus think that the reduction is negligible for applications.

Study on fabrication conditions of the interface-treated trilayer junctions

We have investigated the effects of fabrication conditions on the properties of the interface-treated trilayer Josephson junctions. In the junctions, barriers are formed by ion milling, followed by annealing. We controlled the accelerating voltage for the milling process and the gas pressure for the annealing process. Josephson currents were observed in the junctions fabricated under various conditions. It was found that higher accelerating voltage contributes to the reduction of leakage paths in the barriers. However, clear dependence of the Josephson currents on the conditions was not observed in contrast to the results for the ramp-edge junctions.

Vertically-stacked Josephson junctions using YbBa/sub 2/Cu/sub 3/O/sub 7-x/ as a counter electrode for improving uniformity

We have fabricated vertically-stacked interface-treated Josephson junctions using YbBa/sub 2/Cu/sub 3/O/sub 7-x/ (YbBCO) as a counter electrode for improving the uniformity. We used YBCO for the base electrode. Most of the junctions fabricated on one chip exhibited resistively-shunted-junction (RSJ) characteristics. The properties of the junctions at 4.2 K were as follows: J/sub c/=1.0/spl times/10/sup 3/ A/cm/sup 2/ with a 1/spl sigma/ spread of 6.9%, and I/sub c/R/sub n/=0.5 mV with a 1/spl sigma/ spread of 5.4%. These spreads were improved compared with those of junctions with YBCO as a counter electrode. Furthermore, the normal conductance G/sub n/ of the junctions with the YbBCO counter electrode was independent of the temperature. Such characteristics have not been obtained for YBCO vertically-stacked interface-treated junctions. We speculate that this difference is attributed to the lattice mismatch between base-and counter-electrodes.

Investigation of properties of stacked-type interface-treated Josephson junctions fabricated with PrGaO/sub 3/ doping process

We have investigated how surface morphology of base YBa/sub 2/Cu/sub 3/O/sub 7-/spl delta// (YBCO) films affects the properties of the stacked-type interface-treated junctions (ITJ) with the PrGaO/sub 3/ (PGO) doping process. In the ITJs, the junction barriers are formed by Ar ion milling and subsequent annealing, without depositing artificial barriers. The PGO doping process was carried out for eliminating excess currents of the junctions. Our results suggest that the YBCO films suitable for the junctions should consist of similar size grains, and do not contain any precipitates. Furthermore, the morphology should not be changed after the Ar ion milling. The nine junctions fabricated on such a film exhibit the averaged critical current density (J/sub c/) on the chip of 9.0/spl times/10/sup 3/ A/cm/sup 2/, the small 1/spl sigma/ spread of 5.6% in the J/sub c/, and the averaged I/sub c/R/sub n/ product on the chip of 1.5 mV with overdamped characteristics at 4.2 K.

Effects of etching conditions on interface-treated trilayer junctions

Abstract The effects of an etching condition on the trilayer junctions fabricated by the interface treatment have been studied. The junctions have no deposited barriers and are made through an etching process and an annealing process at the surface of YBa 2 Cu 3 O 7− x (YBCO) films. We controlled the incidence angle of the ion beam in the etching process. The atomic-force microscope observations of the YBCO surfaces etched with different incidence angles suggested that the incidence angle affects the formation of amorphous layer. Moreover, it was found that the critical current of the junctions changed by the incidence angle. These results indicate that we can control the junction parameters of the interface-treated trilayer junctions.

Analysis of the barrier in vertically-stacked interface-treated Josephson junctions

The authors have investigated the structure and the composition of the barrier in YBCO vertically-stacked-type interface-treated Josephson junctions by TEM and TEM-EDS. The barrier was formed by the Ar ion milling of the base YBCO electrode surface and the subsequent annealing. For a sample treated with accelerating voltage (V/sub acc/) of 1300 V, we observed Y/sub 2/O/sub 3/ phases in the barrier. In contrast, for a sample with V/sub acc/=700 V, we could observe few Y/sub 2/O/sub 3/ phases. Our TEM observation suggested that junctions with higher J/sub c/ fabricated with lower V/sub acc/ would have thinner and more uniform barriers. In addition, the composition of the barrier was Y-rich and Cu-poor, and such deviation decreased with decreasing V/sub acc/. These tendencies well correspond to the results for ramp-edge-type junctions reported so far.

Improvement of interface-treated junctions using vicinal SrTiO3 substrates

We have studied the improvement of vertically-stacked-structure Josephson junctions, employing both the interface-treated junction technique and flat YBa 2 Cu 3 O 7-δ (YBCO) films using vicinal SrTiO 3 (STO) substrates. The obtained film exhibited root-mean-square roughness of 2.3 nm, which was smaller than that of the films on normal substrates. We fabricated two chips in order to examine the reproducibility. We measured seven junctions on one chip. These junctions showed typical magnetic field modulation of the critical current density (J c ) of 83% at 4.2 K. The averaged J c and the averaged normalized resistance (R n A) were 5.0 x 10 3 A cm -2 with a 1σ spread of 4.0% and 3.1 x 10 -7 Ω cm 2 with a 1σ spread of 6.4%, respectively. Thus junctions of small excess current with small spread were obtained. To examine the reproducibility of the junctions, we compared these junctions with those on the other chip, where the average J c were 3.7 × 10 3 A cm -2 . The results showed the improvement of the reproducibility by flat YBCO films using vicinal STO substrates.

Reproducibility and Controllability of Critical Current for Ramp-edge Interface-Modified Junctions

Abstract We have investigated the relationship between process parameters and junction characteristics ( I c , R n ) of interface-modified junctions (IMJs) made on MgO substrates, and have derived empirical equations from the obtained relationships. Thin and uniform tunnel barriers of IMJs were formed by ion irradiation and annealing. We chose accelerating voltage ( V acc ), etching time ( t etch ) and deposition temperature ( T dep ) as the process parameters for the control of critical current ( I c ). We prepared four different samples fabricated in the same conditions, and examined the reproducibility and controllability of I c . The obtained I c s were very close to the expected value, and the run-to-run 1 σ -spread was 20% at 4.2 K. Furthermore, we could also control I c of IMJ made on SrTiO 3 substrates.