Mihai Udrescu
Information Technology University
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Publication
Featured researches published by Mihai Udrescu.
international conference on cloud and green computing | 2013
Alexandru Topirceanu; Mihai Udrescu; Mircea Vladutiu
The analysis of complex networks revolves around the common fundamental properties found in most natural and synthetic networks that surround us. Each such network is commonly described through a standard set of graph metrics, yet there is no unified and efficient method of quantitatively compare networks to each other. This paper introduces the network fidelity metric delta (δ) which is aimed at offering the possibility to compare networks to each other based on individual metric measurements. Depending on the nature of the comparison, it can offer insight on network model similarity or synthetic model realism compared to a real world network. We apply the metric in a social network modeling scenario and also compare it to another metric - the fractal dimension - highlighting the superior analytic power of our metric.
nasa dod conference on evolvable hardware | 2004
Lucian Prodan; Mihai Udrescu; Mircea Vladutiu
Space applications endorse the quest for dependable computing as a vital requirement instead of an expendable quality indicator. A novel direction in designing digital systems with superior dependability is based on bio-inspiration. As a key representative, the Embryonics project implements bio-inspired robustness, the backbone of its fault tolerance being a two level hierachical self-repair. However, the outer space radiation-hard environment is especially harsh to electronic devices, causing a variety of errors (soft fails). The memory structures employed by Embryonics cannot be protected by its self-repairing mechanism. Therefore we investigate the causes and influences of soft fails over the current Embryonics framework and propose a solution for the identified vulnerability based on error correcting codes. We also provide a reliability comparison between memory structures with and without error correcting codes.
computing frontiers | 2006
Mihai Udrescu; Lucian Prodan; Mircea Vlăduţiu
This paper presents a new methodology for running Genetic Algorithms on a Quantum Computer. To the best of our knowledge and according to reference [6]there are no feasible solutions for the implementation of the Quantum Genetic Algorithms (QGAs). We present a new perspective on how to build the corresponding QGA architecture. It turns out that the genetic strategy is not particularly helpful in our quantum computation approach; therefore our solution consists of designing a special-purpose oracle that will work with a modified version of an already known algorithm (maximum finding [1]), in order to reduce the QGAs to a Grover search. Quantum computation offers incentives for this approach, due to the fact that the qubit representation of the chromosome can encode the entire population as a superposition of basis-state values.
computing frontiers | 2005
Mihai Udrescu; Lucian Prodan; Mircea Vlǎduţiu
The need for error detection and correction techniques is vital in quantum computation, due to the omnipresent nature of quantum errors. No realistic prospect of an operational quantum computational device may be warranted without such mechanisms. Therefore, the fact that error detecting and correcting techniques have been developed has enhanced the feasibility of a potential quantum computer [15] [18]. This paper presents a methodology for improving the fault tolerance of quantum circuits by using the so-called reconfigurable Quantum Gate Arrays (rQGAs). Our solution reduces the problem of stabilizer coding safe recovery to preserving a given quantum configuration state. As shown in this papers practical example, the configuration register to be protected has a reduced number of qubits, and the overall dependability attribute [2]-- reliability measured by the accuracy threshold [15]-- is drastically improved
annual simulation symposium | 2005
Mihai Udrescu; Lucian Prodan; Mircea Vladutiu
When performed on a classical computer, the simulation of quantum circuits is usually an exponential job. The methodology based on Hardware Description Languages is able to isolate the entanglement as source of simulation complexity. However, it was shown that this methodology is not efficient in the presence of total entanglement, and the probability of such a situation grows exponentially with the number of qubits [ M. Udrescu, L. Prodan, M Vladutiu (2004) ]. The bubble bit technique is designed to avoid the entangled representation of the quantum state, thus allowing the HDL structural description of the quantum circuit, which requires polynomial resources for simulation. We provide experimental runtimes, obtained by simulation of quantum arithmetic and Grovers algorithm circuits, which indicate substantial runtime speedup.
international conference on adaptive and natural computing algorithms | 2007
Cristian Ruican; Mihai Udrescu; Lucian Prodan; Mircea Vladutiu
This paper proposes an automated quantum circuit synthesis approach, using a genetic algorithm. We consider the circuit as a successive rippling of the so-called gate sections; also, the usage of a database is proposed in order to specify the gates that will be used in the synthesis process. Details are presented for an appropriate comparison with previous approaches, along with experimental results that prove the convergence and the effectiveness of the algorithm.
design and diagnostics of electronic circuits and systems | 2007
Alexandru Amaricai; Mircea Vladutiu; Lucian Prodan; Mihai Udrescu; Oana Boncalo
This paper proposes a new approach for the optimization process of the interval addition and multiplication floating point units. For the interval addition/subtraction, an adder exploiting the parallelism of the double path adder structure is used. The two floating point additions needed are performed simultaneously on different data paths. Therefore, the performance of the proposed adder can be the same as that of two individual floating point adders, but with a much reduced cost overhead. Regarding the interval multiplication, a multiplier architecture was designed, in order to be suitable for pipelined structures. It consists of a floating point multiplier which computes two results for the same operation (rounded differently), and of two floating point comparators. In terms of performance, the proposed multiplier unit presents half of the performance of a conventional floating point multiplier. This is not a drawback, if we consider the fact that interval multiplication requires four floating point operations and six comparisons. This paper shows that interval arithmetic can be efficiently implemented in terms of performance and cost.
design and diagnostics of electronic circuits and systems | 2010
Liviu Agnola; Mircea Vladutiu; Mihai Udrescu
This paper proposes a graceful degradation method applied to k-way set associative cache memories. The method is called “Self Adaptive cache Memories” (SAM); it works by removing the faulty locations from use, while reorganizing the memory to maintain a high performance. For the proposed contribution, the analysis provided herein reveals a significant reliability increase for the cache memory, while the entailed overhead remains small in comparison with the attained goals.
NICSO | 2008
Cristian Ruican; Mihai Udrescu; Lucian Prodan; Mircea Vladutiu
This paper proposes an object oriented framework for genetic algorithm implementations. Software methods and design patterns are applied in order to create the necessary abstract levels for the genetic algorithm. The architecture is presented in UML terms, while several genetic algorithm schemes are already implemented. The framework allows for different configurations, thus the comparison between the characteristics of the emerged solutions becomes straightforward. This design creates incentives for practical solutions, because the inheritance from the defined abstract classes makes the creation of new genetic schemes possible. This framework was tested for the GA quantum circuit synthesis on several benchmark circuits. The genetic algorithm created with our framework proved to be faster than other available similar solutions used for quantum circuit synthesis.
annual simulation symposium | 2007
Oana Boncalo; Mihai Udrescu; Lucian Prodan; Mircea Vladutiu; Alexandru Amaricai
This paper addresses the problem of evaluating the fault tolerance algorithms and methodologies (FTAMs) designed for quantum systems, by adopting the simulated fault injection methodology from classical computation. Due to their wide spectrum of applications (including quantum circuit simulation) and hierarchical features, the HDLs were employed for performing fault injection, as prescribed by the guidelines of the QUERIST project. At the same time, the injection techniques taken from classical circuit simulation had to be adapted to quantum computation requirements, including the specific quantum error models. The experimental simulated fault injection campaigns are thoroughly described along with the experimental results, which confirm the analytical expectations