Mircea Vladutiu

Design Issues and Implementations for Floating-Point Divide–Add Fused

This brief presents a dedicated unit for the combined operation of floating-point (FP) division followed by addition/subtraction-the divide-add fused (DAF). The goal of this unit is to increase the performance and the accuracy of applications where this combined operation is frequent, such as the interval Newtons method or the polynomial approximation. The proposed DAF unit presents a similar architecture to the FP multiply-accumulate units. The main difference is represented by the divider, which is implemented using digit-recurrence algorithms. An important design tradeoff regarding DAF is represented by the number of required quotient bits. We present the impact of the adopted number of quotient bits on accuracy, cost, and performance. Consequently, two implementations are proposed: one pro-accuracy and one pro-performance. We show that the proposed implementations have better accuracy with respect to the solution based on two distinct units: an FP divider and an FP adder. The implementation suitable for lower latency presents the best cost-performance tradeoff.

Network Fidelity: A Metric to Quantify the Similarity and Realism of Complex Networks

The analysis of complex networks revolves around the common fundamental properties found in most natural and synthetic networks that surround us. Each such network is commonly described through a standard set of graph metrics, yet there is no unified and efficient method of quantitatively compare networks to each other. This paper introduces the network fidelity metric delta (δ) which is aimed at offering the possibility to compare networks to each other based on individual metric measurements. Depending on the nature of the comparison, it can offer insight on network model similarity or synthetic model realism compared to a real world network. We apply the metric in a social network modeling scenario and also compare it to another metric - the fractal dimension - highlighting the superior analytic power of our metric.

Self-repairing embryonic memory arrays

Space applications endorse the quest for dependable computing as a vital requirement instead of an expendable quality indicator. A novel direction in designing digital systems with superior dependability is based on bio-inspiration. As a key representative, the Embryonics project implements bio-inspired robustness, the backbone of its fault tolerance being a two level hierachical self-repair. However, the outer space radiation-hard environment is especially harsh to electronic devices, causing a variety of errors (soft fails). The memory structures employed by Embryonics cannot be protected by its self-repairing mechanism. Therefore we investigate the causes and influences of soft fails over the current Embryonics framework and propose a solution for the identified vulnerability based on error correcting codes. We also provide a reliability comparison between memory structures with and without error correcting codes.

The Bubble Bit Technique as Improvement of HDL-Based Quantum Circuits Simulation

When performed on a classical computer, the simulation of quantum circuits is usually an exponential job. The methodology based on Hardware Description Languages is able to isolate the entanglement as source of simulation complexity. However, it was shown that this methodology is not efficient in the presence of total entanglement, and the probability of such a situation grows exponentially with the number of qubits [ M. Udrescu, L. Prodan, M Vladutiu (2004) ]. The bubble bit technique is designed to avoid the entangled representation of the quantum state, thus allowing the HDL structural description of the quantum circuit, which requires polynomial resources for simulation. We provide experimental runtimes, obtained by simulation of quantum arithmetic and Grovers algorithm circuits, which indicate substantial runtime speedup.

Secret data communication system using steganography, AES and RSA

The paper introduces a new secret data communication system that employs the usage of two state-of-the art cryptographic algorithms (RSA with asymmetric keys and AES with symmetric key) together with steganography. The joining of these three techniques builds a robust steganography-based communication system capable of withstanding multiple types of attacks, detection and reverse engineering. Our system was designed in a way that offers a solution to the major flaws presented in other steganographic communication systems [2][4][5][6]. The secret data is encrypted using AES with a strong key prior to being embedded using a steganographic algorithm [1]. The key used for the data encryption uses a combination between a random generated sequence and a hash of the cover images color information that remains untouched throughout the entire embedding process. The secret data and the key used for encryption both pass multiple levels of security checks that assure the integrity, authenticity and security, making this a reliable communication channel for sensitive data. While all encryption stages assure that the secret data becomes obsolete without the proper decryption perquisites (keys), the steganographic algorithm introduces an additional level of security: stealth.

Automatic Synthesis for Quantum Circuits Using Genetic Algorithms

This paper proposes an automated quantum circuit synthesis approach, using a genetic algorithm. We consider the circuit as a successive rippling of the so-called gate sections; also, the usage of a database is proposed in order to specify the gates that will be used in the synthesis process. Details are presented for an appropriate comparison with previous approaches, along with experimental results that prove the convergence and the effectiveness of the algorithm.

Decreasing Change Impact Using Smart LSB Pixel Mapping and Data Rearrangement

The paper introduces a new optimization strategy in LSB steganography that reduces the image degradation rate in the steganographic carrier. We propose an LSB matching steganographic algorithm based on the principles of genetic algorithms, that aims to reuse the binary image color values in a controlled way so that instead of focusing to change the least significant portion of the color representation (LSBs), we remap the secret data in a manner that reduces the color information loss up to a negligible level. The algorithm improves the statistical analysis immunity of the steganographic image and at the same time offers higher PSNR (an average gain of 2,4 dB) than most of the LSB matching algorithms used in our experiments. Because of the flexibility of this approach, our method represents not only a stand-alone steganographic algorithm, but also an extension to other similar algorithms.

Design of Addition and Multiplication Units for High Performance Interval Arithmetic Processor

This paper proposes a new approach for the optimization process of the interval addition and multiplication floating point units. For the interval addition/subtraction, an adder exploiting the parallelism of the double path adder structure is used. The two floating point additions needed are performed simultaneously on different data paths. Therefore, the performance of the proposed adder can be the same as that of two individual floating point adders, but with a much reduced cost overhead. Regarding the interval multiplication, a multiplier architecture was designed, in order to be suitable for pipelined structures. It consists of a floating point multiplier which computes two results for the same operation (rounded differently), and of two floating point comparators. In terms of performance, the proposed multiplier unit presents half of the performance of a conventional floating point multiplier. This is not a drawback, if we consider the fact that interval multiplication requires four floating point operations and six comparisons. This paper shows that interval arithmetic can be efficiently implemented in terms of performance and cost.

Self-Adaptive mechanism for cache memory reliability improvement

This paper proposes a graceful degradation method applied to k-way set associative cache memories. The method is called “Self Adaptive cache Memories” (SAM); it works by removing the faulty locations from use, while reorganizing the memory to maintain a high performance. For the proposed contribution, the analysis provided herein reveals a significant reliability increase for the cache memory, while the entailed overhead remains small in comparison with the attained goals.

A Genetic Algorithm Framework Applied to Quantum Circuit Synthesis

This paper proposes an object oriented framework for genetic algorithm implementations. Software methods and design patterns are applied in order to create the necessary abstract levels for the genetic algorithm. The architecture is presented in UML terms, while several genetic algorithm schemes are already implemented. The framework allows for different configurations, thus the comparison between the characteristics of the emerged solutions becomes straightforward. This design creates incentives for practical solutions, because the inheritance from the defined abstract classes makes the creation of new genetic schemes possible. This framework was tested for the GA quantum circuit synthesis on several benchmark circuits. The genetic algorithm created with our framework proved to be faster than other available similar solutions used for quantum circuit synthesis.