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Featured researches published by Mihir K. Roy.


IEEE Transactions on Advanced Packaging | 2010

Escape Routing in Modern Area Array Packaging: An Analysis of Need, Trend, and Capability

Bhanu Jaiswal; Mihir K. Roy; Albert H. Titus

With the increasing complexity in the die and package designs and ever increasing cost pressure in todays microelectronic industry, the design for input/output (I/O) routing has assumed a vital role in the overall product design. This scenario is primarily driven by the increase in the I/O terminal counts in both die and package. Several authors have already described the possibility of using various escape routing models in order to maximize the number of I/Os in a given area. However, these models suffer from many drawbacks and fail to address the importance of processing factors and the actual manufacturing conditions. Therefore, a new design guideline for escape routing has been developed to achieve the maximum I/O density under the actual manufacturing, processing and cost related constraints. The correlation between the real world constraints and their impact on I/O routing has been explored and used as a foundation for developing design guidelines. This approach has been presented through a comprehensive case study that covers various design scenarios, provides the right set of real world trade-offs that need to be considered and simultaneously highlights the drawbacks in existing models.


Archive | 2015

Device packaging with substrates having embedded lines and metal defined pads

Mark S. Hlad; Islam A. Salama; Mihir K. Roy; Tao Wu; Yueli Liu; Kyu Oh Lee


Archive | 2016

High density organic bridge device and method

Mihir K. Roy; Stephanie M. Lotz; Wei-Lun Kane Jen


Archive | 2009

Through mold via polymer block package

Mihir K. Roy; Islam A. Salama; Charavana K. Gurumurthy; Robert L. Sankman


Archive | 2014

HIGH DENSITY INTERCONNECT DEVICE AND METHOD

Mihir K. Roy; Mathew J. Manusharow


Archive | 2013

Reduced pth pad for enabling core routing and substrate layer count reduction

Debendra Mallik; Mihir K. Roy


Archive | 2009

Microelectronic package and method for a compression-based mid-level interconnect

Brent M. Roberts; Mihir K. Roy; Sriram Srinivasan; Sridhar Narasimhan


Archive | 2006

POLYMER-BASED INTEGRATED THIN FILM CAPACITORS, PACKAGES CONTAINING SAME AND METHODS RELATED THERETO

Mihir K. Roy; Islam A. Salama; Yongki Min


Archive | 2017

DUAL SIDE SOLDER RESIST LAYERS FOR CORELESS PACKAGES AND PACKAGES WITH AN EMBEDDED INTERCONNECT BRIDGE AND THEIR METHODS OF FABRICATION

Manohar S. Konchady; Tao Wu; Mihir K. Roy; Wei-Lun K. Jen; Yi Li


Archive | 2009

Patch on interposer assembly and structures formed thereby

Brent M. Roberts; Mihir K. Roy; Sriram Srinivasan

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