Mikkel A. Thomas

Smart CMOS focal plane arrays: a Si CMOS detector array and sigma-delta analog-to-digital converter imaging system

This paper evaluates the potential for the real-time utilization of high frame rate image sequences using a fully parallel readout system. Multiple readout architectures for high frame rate imaging are compared. The application domain for a fully parallel readout system is identified, and the design for a fully parallel, monolithically integrated smart CMOS focal plane array is presented. This focal plane image processing chip, with an 8/spl times/8 array of Si CMOS detectors each of which have a dedicated on-chip current input first-order sigma-delta analog-to-digital converter front end, has been fabricated, and test results for uniformity and linearity are presented.

Integrated mixed-signal optoelectronic system-on-a-chip sensor

A mixed-signal optoelectronic system-on-a-chip sensor was integrated with embedded photodetector arrays and interferometric optical waveguides on a silicon (Si) complementary metal oxide semiconductor (CMOS) circuit chip. Photodetector (PD) arrays were fabricated with parallel mixed-signal delta-sigma (/spl Delta//spl Sigma/) analog-to-digital converters (ADC) using a standard 1.5 /spl mu/m n-well Si CMOS process. The electrical and optical sensitivities of the circuit were measured and the data suggests that the circuit can detect 100 pW optical power. On the fabricated 4.6/spl times/4.7 mm/sup 2/ chip, interferometric optical waveguides were integrated, and the complete system was a miniaturization of a Mach Zehnder interferometer-based sensor system. The integrated sensor micro system was tested with water vapor and the multimode interference pattern changes at the output of the interferometer were observed with the on-chip photodetector and ADC array.

Data acquisition sensitivity determination of a sensor-on-a-chip integrated microsystem

A sensor-on-a-chip integrated microsystem was implemented through standard silicon (Si) complementary metal oxide semiconductor (CMOS) fabrication and optical waveguide integration processes. The fabricated Si CMOS chip has embedded lateral pnp bipolar junction transistor (BJT) photodetector arrays and low-noise analog front-ends for signal conditioning and photodetector support. An array of parallel mixed-signal oversampled noise-shaping analog-to-digital converter (ADC) circuits was implemented as a sensor readout system. Mach Zehnder interferometric optical waveguides were post-processed on the fabricated chip surface. The electrical and optical sensitivity of the sensor Si CMOS integrated circuit signal processing components is reported, and optical sensitivity of 100 pW is inferred from measured data.

Polymer waveguide optical interconnections on Si CMOS circuits

Summary form only given. We report demonstrations of optical interconnections on foundry Si CMOS circuits using polymer optical waveguides. The polymer optical waveguides were directly fabricated on two Si CMOS circuits. The cladding/planarization layer was benzocyclobutene (BCB) and polyetherimide (ULTEM) was used as the waveguide core material.

Integration of Si-CMOS Embedded Photo Detector Array and Mixed Signal Processing System with Embedded Optical Waveguide Input

Arrays of embedded bipolar junction transistor (BJT) photo detectors (PD) and a parallel mixed-signal processing system were fabricated as a silicon complementary metal oxide semiconductor (Si-CMOS) circuit for the integration optical sensors on the surface of the chip. The circuit was fabricated with AMI 1.5um n-well CMOS process and the embedded PNP BJT PD has a pixel size of 8um by 8um. BJT PD was chosen to take advantage of its higher gain amplification of photo current than that of PiN type detectors since the target application is a low-speed and high-sensitivity sensor. The photo current generated by BJT PD is manipulated by mixed-signal processing system, which consists of parallel first order low-pass delta-sigma oversampling analog-to-digital converters (ADC). There are 8 parallel ADCs on the chip and a group of 8 BJT PDs are selected with CMOS switches. An array of PD is composed of three or six groups of PDs depending on the number of rows.

High speed, smart focal plane processing using integrated photodetectors and Si CMOS VLSI sigma delta analog to digital converters

We report on the first demonstration of a high frame rate smart pixel imaging system which uses an ADC for in each pixel in an 8x8 integrated detector array. The smart pixel architecture of this system enables frame rates up to 100 kfps operating in continuous imaging mode.

Optoelectronic Microsystems Integration

In the quest to boost performance and shorten processing times, optical functions are being integrated into system-on-a-package and system-on-a-chip applications.

Smart photonics: optoelectronics integrated with Si CMOS VLSI circuits

Smart photonics, the integration of optoelectronic devices with electronic circuits and systems, has growing applications in many fields, one of which is computing. An exploration of the opportunities, integration technologies, and some recent results using thin film optoelectronic and electronic device integration with Si CMOS VLSI and GaAs MESFET technologies are presented herein. Applications explored herein include low cost alignment tolerant optoelectronic interconnection links for network inerconnections, smart focal plane array processing through the integration of imaging arrays with sigma delta analog to digital converters underneath each pixel, and three dimensional computational systems using vertical through-Si optical interconnections.