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Dive into the research topics where Martin A. Brooke is active.

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Featured researches published by Martin A. Brooke.


IEEE Electron Device Letters | 1991

A floating-gate MOSFET with tunneling injector fabricated using a standard double-polysilicon CMOS process

Axel Thomsen; Martin A. Brooke

A floating-gate MOSFET which is programmable in both directions by Fowler-Nordheim tunneling and is fabricated using an inexpensive standard 2- mu m double-polysilicon CMOS technology is discussed. Tunneling occurs at a crossover of polysilicon 1 with polysilicon 2. Device layout and basic device characteristics are presented, and recommendations for efficient programming are given. This is the first floating-gate FET with a tunneling injector fabricated in standard technology that has close to symmetric programming characteristics for both charging and discharging of the gate.<<ETX>>


IEEE Journal of Selected Topics in Quantum Electronics | 2003

The heterogeneous integration of optical interconnections into integrated microsystems

Nan Marie Jokerst; Martin A. Brooke; Sang-Yeon Cho; S.T. Wilkinson; M. Vrazel; S. Fike; J. Tabler; Yoong Joon Joo; Sang-Woo Seo; D.S. Wills; April S. Brown

Emerging techniques for integrating optoelectronic (OE) devices, analog interface circuitry, RF circuitry, and digital logic into ultra-mixed signal systems offers approaches toward and demonstrations of integrated optical interconnections in electrical microsystems. As rising data rates dictate the use of optical interconnections and interfaces at increasingly smaller distances, optical interconnections stand at a threshold of opportunity for pervasive implementation if cost-effective integration process technology and performance can be implemented. Heterogeneous integration is one approach toward the integration of compound semiconductor OE devices, Si CMOS circuits, and organic materials. Heterogeneous integration approaches, which utilize dissimilar materials which can be independently grown and optimized, and are subsequently bonded together into an integrated system, are particularly attractive methods for creating high-performance microsystems. This paper describes a variety of optical interconnections integrated into microsystems using thin film heterogeneous integration. Thin film heterogeneous integration is attractive from the standpoint that the topography of the integrated microsystem can remain flat to within a few microns, substrates which are often optically absorbing are removed, both sides of the thin film devices can be processed (e.g., contacted, optically coated), and three-dimensionally stacked structures can be implemented. Demonstrations of interconnections using thin film heterogeneous integration technology include an integrated InGaAs/Si CMOS receiver circuit operating at 1 Gbps, an InGaAs thin film photodetector bonded onto a foundry Si CMOS microprocessor to demonstrate a single chip optically interconnected microprocessor, smart pixel emitter and detector arrays using resonant cavity enhanced P-i-N photodetectors bonded on top of per-pixel current controlled oscillators and resonant cavity enhanced light emitting diodes integrated onto digital to analog converter gray-scale per-pixel driver circuitry, and photodetectors embedded in waveguides on electrical interconnection substrates to demonstrate chip-to-chip embedded waveguide interconnections.


ieee industry applications society annual meeting | 1995

Identification and control of induction motor stator currents using fast on-line random training of a neural network

Bruce Burton; Farrukh Kamran; Ronald G. Harley; Thomas G. Habetler; Martin A. Brooke; Ravi Poddar

Artificial neural networks (ANNs) which have no off-line pre-training, can be trained continually on-line to identify an inverter fed induction motor and control its stator currents. Due to the small time constants of the motor circuits, the time to complete one training cycle has to be extremely small. This paper proposes and evaluates a new, fast, on-line training algorithm which is based on the method of random search training, termed the random weight change (RWC) algorithm. Simulation results show that RWC training of an ANN yields performance very much the same as conventional backpropagation training. Unlike backpropagation, however, the RWC method can be implemented in mixed digital/analog hardware, and still have a sufficiently small training cycle time. The paper also proposes a VLSI implementation which one training cycle in as little as 8 /spl mu/sec. Such a fast ANN can identify and control the motor currents within a few milliseconds and thus provide self-tuning of the drive while the ANN has no prior information whatsoever of the connected inverter and motor.


IEEE Photonics Technology Letters | 1992

Vertical electrical interconnection of compound semiconductor thin-film devices to underlying silicon circuitry

C. Camperi-Ginestet; Y.W. Kim; Nan Marie Jokerst; Mark G. Allen; Martin A. Brooke

A three-dimensional integration technology that electrically connects an independently optimized thin-film device layer to a Si circuitry layer is reported. An epitaxial liftoff GaAs thin-film optical detector is integrated directly on top of Si amplifier circuitry with a planarizing, insulating layer of polymide between the detector and the circuitry. The detector is virtually connected to the circuitry below through an electrical via in the insulator. This integration technology enables monolithic, massively parallel vertical interconnection between two independently optimized device layers. Systems such as image processing arrays should significantly benefit from this massively parallel integration technology.<<ETX>>


IEEE Electron Device Letters | 1999

RTD/CMOS nanoelectronic circuits: thin-film InP-based resonant tunneling diodes integrated with CMOS circuits

J.I. Bergman; J.J. Chang; Youngjoong Joo; Babak Matinpour; Joy Laskar; Nan Marie Jokerst; Martin A. Brooke; B. Brar

The combination of resonant tunneling diodes (RTDs) and complementary metal-oxide-semiconductor (CMOS) silicon circuitry can offer substantial improvement in speed, power dissipation, and circuit complexity over CMOS-only circuits. We demonstrate the first integrated resonant tunneling CMOS circuit, a clocked 1-bit comparator with a device count of six, compared with 21 in a comparable all-CMOS design. A hybrid integration process is developed for InP-based RTDs which are transferred and bonded to CMOS chips. The prototype comparator shows sensitivity in excess of 10/sup 6/ VIA, and achieves error-free performance in functionality testing. An optimized integration process, under development, can yield high-speed, low power circuits by lowering the high parasitic capacitance associated with the prototype circuit.


IEEE Transactions on Power Electronics | 1998

A fast on-line neural-network training algorithm for a rectifier regulator

Farrukh Kamran; Ronald G. Harley; Bruce Burton; Thomas G. Habetler; Martin A. Brooke

This paper addresses the problem of deadbeat control in fully controlled high-power factor rectifiers. Improved deadbeat control can be achieved through the use of neural network-based predictors for the input current reference to the rectifier. In this application, online training is absolutely required. In order to achieve sufficiently fast online training, a new random search algorithm is presented and evaluated. Simulation results show that this type of network training yields equivalent performance to standard backpropagation training. Unlike backpropagation, however, the random weight change method can be implemented in mixed digital/analog hardware for this application. The paper proposes a very large-scale integration implementation which achieves a training epoch as low as 8 /spl mu/s.


IEEE Journal of Selected Topics in Quantum Electronics | 2002

Integrated detectors for embedded optical interconnections on electrical boards, modules, and integrated circuits

Sang-Yeon Cho; Sang-Woo Seo; Martin A. Brooke; Nan Marie Jokerst

Significant opportunities exist for optical interconnections at the board, module, and chip level if compact, low-loss, high-data-rate optical interconnections can be integrated into these electrical interconnection systems. To create such an integrated optoelectronic/electronic microsystem, mask-based alignment of the optical interconnection waveguide, optoelectronic active devices, and interface circuits is attractive from a packaging alignment standpoint. This paper describes an integration process for creating optical interconnections which can be integrated in a postprocessing format onto standard boards, modules, and integrated circuits. These optical interconnections utilize active thin-film optoelectronic components embedded in the waveguide/interconnection substrate, thus eliminating the need for optical beam turning elements and their alignment, and providing an electrical output on the substrate from an optical interconnection. These embedded optical interconnections are reported herein using BCB polymer optical waveguides with embedded InGaAs-based thin-film inverted metal-semiconductor-metal (I-MSM) photodetectors on an Si substrate. These interconnections have been fabricated and tested, and the coupled optical signal from the waveguide to the embedded photodetector was theoretically modeled at 56.4%, which was supported by an experimental estimate of 47.8%. The measured full-width at half maximum of the electrical pulse from the MSM photodetector embedded in the waveguide was 16.73 ps for an input 500-fs optical laser pulse.


Proceedings of Massively Parallel Processing Using Optical Interconnections | 1996

SIMPil: an OE integrated SIMD architecture for focal plane processing applications

H.H. Cat; A. Gentile; J.C. Eble; Myunghee Lee; O. Vendier; Young Joong Joe; D.S. Wills; Martin A. Brooke; Nan Marie Jokerst; April S. Brown

Focal plane processing applications present a growing computing need for portable telecomputing and videoputing systems. This paper demonstrates the integration of digital processing, analog interface circuitry, and thin film OE devices into a compact computing package. The SIMPil architecture provides a programmable, silicon efficient SIMD processor for effective execution of early image processing applications such as edge detection, convolution, and compression. Results from a demonstration SIMPil node are presented including its microarchitecture, and performance on image processing applications.


IEEE Photonics Technology Letters | 1995

8 x 8 array of thin-film photodetectors vertically electrically interconnected to silicon circuitry

S. Fike; B. Buchanan; Nan Marie Jokerst; Martin A. Brooke; Tonia G. Morris; Stephen P. DeWeerth

This paper reports the integration of an 8/spl times/8 array of thin-film GaAs-AlGaAs photodetectors onto a silicon-oscillator array circuit for massively parallel-image processing applications. Each detector was electrically connected to the oscillator below it using vertical electrical interconnections. Both sides of the thin-film devices were metallized for electrical contact, which minimized the interconnection density on the silicon circuit, thereby maximizing the available signal processing area. The yield of this integrated array and associated circuit was 100%, with the majority of pixels demonstrating a dynamic range of 50 dB.<<ETX>>


IEEE Transactions on Biomedical Circuits and Systems | 2009

Progress in Chip-Scale Photonic Sensing

Nan Marie Jokerst; Lin Luan; Sabarni Palit; Matthew Royal; Sulochana Dhar; Martin A. Brooke; Talmage Tyler

Chip-scale integrated planar photonic sensing systems for portable diagnostics and monitoring are emerging, as photonic components are integrated into systems with silicon (Si), Si complementary metal-oxide semiconductor, and fluidics. This paper reviews progress in these areas. Medical and environmental applications, candidate photonic sensors, integration methodologies, integrated subsystem demonstrations, and challenges facing this emerging field are discussed in this paper.

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Sang-Yeon Cho

New Mexico State University

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D.S. Wills

Georgia Institute of Technology

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O. Vendier

Georgia Institute of Technology

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B. Buchanan

Georgia Institute of Technology

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Mikkel A. Thomas

Georgia Institute of Technology

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M. Vrazel

Georgia Institute of Technology

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