Mikko Honkala
Aalto University
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Publication
Featured researches published by Mikko Honkala.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 2011
Pekka Miettinen; Mikko Honkala; Janne Roos; Martti Valtonen
This paper presents a robust partitioning-based model-order reduction (MOR) method, PartMOR, suitable for reduction of very large RLC circuits or RLC-circuit parts of a non-RLC circuit. The MOR is carried out on a partitioned circuit, which enables the use of low-order moments and macromodels of few elements, while still preserving good accuracy for the reduction. As the method produces a positive-valued, passive, and stable reduced-order RLC circuit (netlist-in-netlist-out), it can be used in conjunction with any standard analysis tool or circuit simulator without modification. It is shown that PartMOR achieves excellent reduction results in terms of accuracy and reduced CPU time for RLC, RC, and RL circuits.
Archive | 2012
Pekka Miettinen; Mikko Honkala; Janne Roos; Martti Valtonen
This paper presents a novel stand-alone method for overcoming a singular system matrix in Model-Order Reduction (MOR) algorithms, which would otherwise foil successful algorithm operation and thus reduction. The basic idea of the method is to locate and identify the circuit areas that generate the singularities to the system matrix prior to MOR, and exclude these from the reduction. The method is applicable to any netlist-in–netlist-out type MOR method.
Archive | 2012
Pekka Miettinen; Mikko Honkala; Janne Roos; Martti Valtonen
This paper describes a novel model-order reduction (MOR) method to reduce the number of mutual inductances in conjunction with a recently proposed MOR algorithm, PartMOR. As the method produces passive mutual inductances as a reduction realization, it extends the existing RLC-in–RLC-out PartMOR to a RLCM-in–RLCM-out MOR method. The method is verified and compared to a well-known MOR method with test simulations and is shown to produce good reduction results in terms of CPU speed-up and generated error.
global engineering education conference | 2013
Anu Lehtovuori; Mikko Honkala; Henrik Kettunen; Johanna Leppävirta
Active learning, project-based teaching, and student collaboration are current trends in engineering education. Incorporating these have also been the goal of the basic studies development project EPOP started at the Aalto University School of Electrical Engineering in 2011. In the project, two obligatory basic courses in circuit analysis and electromagnetic field theory have been taught using interactive engagement during the spring of 2012. This paper presents the implementation of the teaching, including methods and evaluation with several concrete examples. As a result of the novel teaching, motivation and the engagement of students were at a high level during the whole course and learning results were better than those of the students participating the traditional lecture course.
IEEE Transactions on Very Large Scale Integration Systems | 2013
Pekka Miettinen; Mikko Honkala; Janne Roos; Martti Valtonen
Parasitic elements play a major role in advanced circuit design and pose considerable run-time and memory problems for the post-layout verification, especially in the case of full-chip extraction. This brief presents a realizable R(L)C(M)-netlist-in-R(L)C(M)-netlist-out method to sparsify and reduce the capacitive coupling parasitics in circuits with interconnect lines. The method is applicable in conjunction with partitioning-based model-order reduction algorithms to reduce the complete extracted netlists, or as a stand-alone tool to process only the capacitive coupling. It is shown that, by using the method, circuits with even dense capacitive coupling can be partitioned and reduced efficiently.
Journal of Electronic Testing | 2014
Pekka Miettinen; Mikko Honkala; Janne Roos; Martti Valtonen
Model-order reduction (MOR) is a typical approach to speed up the post-layout verification simulation step in circuit design. This paper studies the benefits of using circuit partitioning in a complete MOR flow. First, an efficient reduction algorithm package comprising of partitioning, reduction, and realization parts is presented. The reduction flow is then discussed using theoretical analysis and simulations from an array of 65-nm technology node interconnect circuits. It is shown that the reduction efficiency and computational costs quickly worsen with increased circuit size when using a direct projection-based MOR approach. In contrast, by using partitioning, the MOR can retain the scalability of the reduction problem, being computationally lighter and more efficient even with larger circuits. In addition, using partitioning may improve the robustness of the MOR flow in cases with circuits with many ports or sensitive verification simulations.
european conference on circuit theory and design | 2013
Mikko Honkala; Pekka Miettinen; Martti Valtonen; Janne Roos
This paper proposes an admittance formulation for improving the stability of the structure-preserving reduced-order interconnect macromodeling algorithm SPRIM and the RLC equivalent circuit synthesis method RLCSYN. A simulation example is presented to show the benefits of admittance formulation.
european conference on circuit theory and design | 2013
Pekka Miettinen; Mikko Honkala; Martti Valtonen; Janne Roos
This paper describes a model-order reduction (MOR) method to reduce an interconnect circuit with possibly dense inductive and capacitive coupling. The method uses partitioning to divide the original circuit into small parts that can be then approximated accurately with low-order reduced-order models (ROMs). The use of low-order ROMs enables the use of positive-valued macromodels with standard RLCK realization. The coupling is reduced with a two-stage reduction separately for the inductive and capacitive coupling. This allows for efficient sparsification of the coupling effect. The method is verified with test simulations of the 65-nm technology node and is shown to produce good reduction results in terms of CPU speedup and generated error.
CASA-report | 2012
Je Virtanen; E. Jan W. ter Maten; Theo G. J. Beelen; Mikko Honkala; Mikko Hulkkonen
Poor initial conditions for Harmonic Balance (HB) analysis of free-running oscillators may lead to divergence of the direct Newton-Raphson method or may prevent to find the solution within an optimization approach. We exploit time integration to obtain estimates for the oscillation frequency and for the oscillator solution. It also provides an initialization of the probe voltage. Next we describe new techniques from bordered matrices and eigenvalue methods to improve Newton methods for Finite Difference techniques in the time domain as well as for Harmonic Balance. The method gauges the phase shift automatically. No assumption about the range of values of the Periodic Steady State solution is needed.
ursi international symposium on electromagnetic theory | 2016
Mikko Honkala; Anu Lehtovuori; Elias Raninen; Pasi Ylä-Oijala
This paper studies how deforming the shape of a patch antenna affects its characteristic modes by applying the characteristic modes theory to analyze EM fields in antenna designs. The resonant frequencies of the lowest modes are in special focus in order to excite several modes in as small a space as possible.